NorCAS 2025
IEEE Nordic Circuits and Systems Conference

October 28 - 29, 2025 | Riga, Latvia

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Conference Agenda

Overview and details of the sessions of this conference. Please select a date or location to show only sessions at that day or location. Please select a single session for detailed view (with abstracts and downloads if available).

Only Sessions at Date / Time

Session Overview

Session

Digital: Co-Design and Mixed-Mode

Time:

Tuesday, 28/Oct/2025:

5:00pm - 6:00pm

Session Chair: Mohsin Abbas, Tampere Unviersity

Location: Room 108

Zunda krastmala 8

Presentations

5:00pm - 5:20pm

FPGA Acceleration of Convolutional Neural Networks at the Edge: A Comparative Study on High-Level Synthesis Frameworks

João Faria^1,2, Fabio Coutinho^1,2, Arnaldo Oliveira^1,2

¹Universidade de Aveiro, Portugal; ²Instituto de Telecomunicações, Aveiro

Faria-FPGA Acceleration of Convolutional Neural Networks-194.pdf

5:20pm - 5:40pm

Improving AI Accelerator Performance Through Co-Designing Neural Networks and Systolic Hardware

Annina Gutermann, Alexey Serdyuk, Foivos Paraskevas, Hella Toto Kiesa, Fabian Lesniak, Jakob Schwarz, Michael Hartmann, Tanja Harbaum, Juergen Becker

Karlsruhe Institute of Technology, Germany

Gutermann-Improving AI Accelerator Performance Through Co-Designing Neural Networks and-179.pdf

5:40pm - 6:00pm

Implementation Study of a Noise Cancellation Filter for a 0–3 MASH Delta-Sigma-ADC

Jonathan Ungethüm, Nicolas Graber, Simon Wilhelmstätter, John G. Kauffman, Maurits Ortmanns

Institute of Microelectronics, University of Ulm, Germany

Ungethüm-Implementation Study of a Noise Cancellation Filter-169.pdf