Fault-Tolerant Character Recognition in Neuromorphic Systems Using RRAM Crossbar Arrays

Fatemeh Shirinzadeh¹, Abhoy Kole¹, Kamalika Datta^1,2, Saeideh Shirinzadeh^1,3, Rolf Drechsler^1,2

1: German Research Centre for Artificial Intelligence (DFKI), Germany; 2: Institute of Computer Science, University of Bremen, Germany; 3: Fraunhofer Institute for Systems and Innovation Research (ISI), Karlsruhe, Germany

Systematic Design of a PVT-Robust CMOS Time-Based-Controlled DC-DC Converter Using Open-Source Tools

Jorge Marin^1,2, Vicente Osorio¹, Andrés Martinez¹, Daniel Arévalos³, Krzysztof Herman⁴, Juan Pablo Martínez Brito⁵, Christian A. Rojas^1,2

1: Department of Electronic Eng., Universidad Tecnica Federico Santa Maria, Valparaiso, Chile; 2: Advanced Center of Electrical and Electronics Engineering, Universidad T´ecnica Federico Santa Mar´ıa; 3: Hochschule M¨unchen University of Applied Sciences, Munich, Germany; 4: IHP – Leibniz Institute for High Performance Microelectronics, Frankfurt (Oder), Germany; 5: CEITEC Semiconductores, Porto Alegre, Brazil

GenIE: Reuse-Oriented Generation of Domain-Specific Instruction Extensions

Philipp van Kempen¹, Andreas Hager-Clukas², Daniel Mueller-Gritschneder³, Ulf Schlichtmann¹

1: Technical University of Munich, Germany; 2: Hochschule München, Germany; 3: TU Wien, Austria

Performance Evaluation of MAGIC-ReRAM Arithmetic Circuits for Low-Latency In-Memory Computing

Saeideh Nabipour¹, Fatemeh Shirinzadeh¹, Kamalika Datta^1,2, Abhoy Kole¹, Saeideh Shirinzadeh^1,3, Rolf Drechsler^1,2

1: Cyber-Physical Systems, DFKI GmbH, Germany; 2: University of Bremen, Germany; 3: Fraunhofer Institute for Systems and Innovation Research (ISI), Karlsruhe, Germany

Novel Verification IP (VIP) for AXI4 interconnects employing Universal Verification Methodology (UVM)

Petri Sydänmaa¹, Jaisal Ashraf¹, Mohsin Abbas²

1: Nokia Networks and Solutions, Finland; 2: Faculty of Information Technology and Communication Sciences, Tampere University

4T Bitcell for Digital Compute-in-Memory

Florian Freye, Christian Lanius, Nils Mutert, Tobias Gemmeke

Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen, Germany

Rust for Safety and Security Critical Systems

Malte Munch¹, Marcus Lindner², Johan Eriksson³, Pawel Dzialo¹, Per Lindgren¹

1: Luleå University of Technology, Sweden; 2: Scania AB, Sweden; 3: Grepit AB, Sweden

Model-Driven Generation of Executable Models for Hardware Specification Validation

Robert Kunzelmann^1,2, Raymund Tonyka^1,2, Vinod Bangalore Ganesh^1,3, Raphael Kunz^1,2, Stephanie Ecker^1,4, Wolfgang Ecker^1,2

1: Infineon Technologies AG, Germany; 2: Technical University of Munich, Germany; 3: Technical University of Dresden, Germany; 4: Chipglobe GmbH, Germany

HyPPA: PPA-Aware Hierarchical RTL Generation and Evaluation of RISC-V Cores Using Hyperparameter Tuning

Mohamed Badawy^1,2, Jiulong Wang^1,2, Vijaydeep Yadav¹, Nguyen Anh Vu Doan¹, Paritosh Kumar Sinha¹, Wolfgang Ecker^1,2

1: Infineon Technologies AG; 2: Technical University of Munich

ChiselTrace: Typed Behavioral Debugging in Chisel Through Signal Dependency Tracing

Jarl Brand¹, Casper Cromjongh¹, Peter Hofstee^1,2, Zaid Al-Ars¹

1: Delft University of Technology, The Netherlands; 2: IBM Infrastructure, Austin, TX, US

FPGA Acceleration of Convolutional Neural Networks at the Edge: A Comparative Study on High-Level Synthesis Frameworks

João Faria^1,2, Fabio Coutinho^1,2, Arnaldo Oliveira^1,2

1: Universidade de Aveiro, Portugal; 2: Instituto de Telecomunicações, Aveiro

Improving AI Accelerator Performance Through Co-Designing Neural Networks and Systolic Hardware

Annina Gutermann, Alexey Serdyuk, Foivos Paraskevas, Hella Toto Kiesa, Fabian Lesniak, Jakob Schwarz, Michael Hartmann, Tanja Harbaum, Juergen Becker

Karlsruhe Institute of Technology, Germany

Implementation Study of a Noise Cancellation Filter for a 0–3 MASH Delta-Sigma-ADC

Jonathan Ungethüm, Nicolas Graber, Simon Wilhelmstätter, John G. Kauffman, Maurits Ortmanns

Institute of Microelectronics, University of Ulm, Germany

A 28-GHz Monostatic OFDM-based ISAC System on RFSoC with Real-time Processing

Yizheng Wu¹, Arif Rahmadian Arifianto², Vishnu Unnikrishnan¹, Anteneh Atumo Gebremariam³, Liang Liu²

1: Tampere University, Finland; 2: Lund University, Sweden; 3: Ericsson AB, Sweden

Hardware Accelerated Synthetic X-ray Medical Image Generation Using HBM-based FPGAs

Sam Aanhane¹, Per Knobs², Rob de Jong², Casper Cromjongh¹, Zaid Al-Ars¹

1: Delft University of Technology, Delft, Netherlands; 2: Philips Medical Systems, Best, Netherlands

System Level Acceleration of Banded Smith Waterman on FPGA

Christian Lanius, Ibrahim Burak Yorulmaz, Tobias Gemmeke

RWTH Aachen University, Germany

Matrix-Vectorized Canonical Signed Digit Quantized Neural Networks for Efficient Forward Pass Simulation

Maria Khan, Jari Nurmi

Tampere University, Finland

Automatic Verification of Analog and Mixed-Signal Neural Network Accelerators and Matrix Multipliers

Roland Müller¹, Bijoy Kundu¹, Jan Maximilian Vieregge¹, Yogesh Patil¹, Ralf Brederlow²

1: Fraunhofer Institut for Integrated Circuits IIS, Germany; 2: Technical University of Munich, Germany

Efficient Prompt Design for Resource-Constraint Deployment of Local LLMs

Aisvarya Adeseye, Jouni Isoaho, Seppo Virtanen, Mohammad Tahir

university of Turku, Finland

Small Packets, Big Challenges: Enhancing Reliability in High-Speed, Low-Latency Inter-FPGA Communication

Vida Sobhani, Jialan Zheng, Tobias Gemmeke

RWTH Aachen, Germany

A Novel Layout–Circuit Co-Design Framework for Radiation Hardening in Nanoscale Technology

Aobo Cui, Eleonora Vacca, Luca Sterpone, Sarah Azimi

Politecnico di Torino, Italy

A (145,128) DEC-TED BCH Decoder with Composite Field and Redundant Arithmetic

Hossein Hashemi Shadmehri, Christian Lanius, Tobias Gemmeke

Chair of Integrated Digital Systems and Circuit Design, RWTH Aachen University

A 22nm Coarse-Grained Reconfigurable Array with Novel Features for Machine Learning and Digital Signal Processing

Waqar Hussain¹, Alexandra Geciova¹, Ralf Hekmann¹, Henry Hoffmann², Zohaib Hassan³, Jari Nurmi³

1: Nordic Semiconductor ASA, Norway; 2: Department of Computer Science, The University of Chicago, Chicago, IL, USA; 3: Wireless Research Centre, Tampere University, Tampere, Finland

A 4-W Ka-Band High Efficiency 0.15 μm GaAs Stacked Power Amplifier Design

Batuhan Dinc, Mustafa Berke Yelten

Istanbul Technical University, Turkiye