Conference Agenda

3:40pm - 4:00pm

AMPER-X: Adaptive Mixed-Precision RISC-V Core for Embedded Applications

Ahmad Othman, Ahmed Kamaleldin, Diana Göhringer

TU Dresden, Germany

4:00pm - 4:20pm

Automated Intrinsic Support for ISA Extensions: Enhancing Software Generation for RISC-V and Beyond

Mayuri Bhadra^1,2, Stephanie Ecker^1,3, Daniel Albert¹, Ravindra Ramaiah¹, Sebastian Prebeck¹, Wolfgang Ecker^1,2

¹Infineon Technologies AG, Germany; ²Technical University of Munich, Munich, Germany; ³Chipglobe GmbH, Neubiberg, Germany

4:20pm - 4:40pm

Fully Automatic Compiler Retargeting and CVX-IF Hardware Interface Generation for RISC-V Custom Instructions

Kari Hepola¹, Tharaka Ranasinghe Arachchige¹, Joonas Multanen¹, Pekka Jääskeläinen^1,2

¹Tampere University, Finland; ²Intel Finland Oy

4:40pm - 5:00pm

Hardware Solutions for Eliminating Context Switching Latency in Processor-Based Hard Real-Time Systems

Antti Nurmi, Abdesattar Kalache, Timo D. Hämäläinen

Tampere University, Finland

5:00pm - 5:20pm

RISC-V Triplet: Tapeouts for Security Applications

Jonas Schupp¹, Patrick Karl¹, Jens Nöpel¹, Alexander Hepp¹, Tim Music¹, Georg Sigl^1,2

¹Technical University of Munich, Munich, Germany; ²Fraunhofer Institute for Applied and Integrated Security (AISEC), Garching, Germany