3:40pm - 4:00pmAMPER-X: Adaptive Mixed-Precision RISC-V Core for Embedded Applications
Ahmad Othman, Ahmed Kamaleldin, Diana Göhringer
TU Dresden, Germany
4:00pm - 4:20pmAutomated Intrinsic Support for ISA Extensions: Enhancing Software Generation for RISC-V and Beyond
Mayuri Bhadra1,2, Stephanie Ecker1,3, Daniel Albert1, Ravindra Ramaiah1, Sebastian Prebeck1, Wolfgang Ecker1,2
1Infineon Technologies AG, Germany; 2Technical University of Munich, Munich, Germany; 3Chipglobe GmbH, Neubiberg, Germany
4:20pm - 4:40pmFully Automatic Compiler Retargeting and CVX-IF Hardware Interface Generation for RISC-V Custom Instructions
Kari Hepola1, Tharaka Ranasinghe Arachchige1, Joonas Multanen1, Pekka Jääskeläinen1,2
1Tampere University, Finland; 2Intel Finland Oy
4:40pm - 5:00pmHardware Solutions for Eliminating Context Switching Latency in Processor-Based Hard Real-Time Systems
Antti Nurmi, Abdesattar Kalache, Timo D. Hämäläinen
Tampere University, Finland
5:00pm - 5:20pmRISC-V Triplet: Tapeouts for Security Applications
Jonas Schupp1, Patrick Karl1, Jens Nöpel1, Alexander Hepp1, Tim Music1, Georg Sigl1,2
1Technical University of Munich, Munich, Germany; 2Fraunhofer Institute for Applied and Integrated Security (AISEC), Garching, Germany
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