Conference Agenda

11:40am - 12:00pm

A Systematic Comparison of Side-channel Countermeasures for RISC-V-based SoCs

Abolfazl Sajadi¹, Nusa Zidaric¹, Todor Stefanov¹, Nele Mentens^1,2

¹LIACS, Leiden University, Leiden, The Netherlands; ²ES&S, COSIC, ESAT, KU Leuven, Leuven, Belgium

12:00pm - 12:20pm

Processor Vulnerability Detection with the Aid of Assertions: RISC-V Case Study

Mohammad Reza Heidari Iman¹, Sallar Ahmadi-Pour², Rolf Drechsler^2,3, Tara Ghasempouri¹

¹Tallinn University of Technology; ²University of Bremen; ³Cyber-Physical Systems, DFKI GmbH

12:20pm - 12:40pm

Towards modularity of the Rust RTIC real-time scheduling framework

Zakaria Madaoui¹, Henri Lunnikivi¹, Pawel Dzialo^1,2, Per Lindgren^2,1

¹Tampere University, Finland; ²Luleå University of Technology, Sweden