11:40am - 12:00pmA Systematic Comparison of Side-channel Countermeasures for RISC-V-based SoCs
Abolfazl Sajadi1, Nusa Zidaric1, Todor Stefanov1, Nele Mentens1,2
1LIACS, Leiden University, Leiden, The Netherlands; 2ES&S, COSIC, ESAT, KU Leuven, Leuven, Belgium
12:00pm - 12:20pmProcessor Vulnerability Detection with the Aid of Assertions: RISC-V Case Study
Mohammad Reza Heidari Iman1, Sallar Ahmadi-Pour2, Rolf Drechsler2,3, Tara Ghasempouri1
1Tallinn University of Technology; 2University of Bremen; 3Cyber-Physical Systems, DFKI GmbH
12:20pm - 12:40pmTowards modularity of the Rust RTIC real-time scheduling framework
Zakaria Madaoui1, Henri Lunnikivi1, Pawel Dzialo1,2, Per Lindgren2,1
1Tampere University, Finland; 2LuleƄ University of Technology, Sweden
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