Our distributed task-based runtime system can infer inter-node communications
using user-provided data descriptions. Currently, it allocates all the needed
receive buffers at once, when the task graph is submitted, namely, at the
beginning of the program. This method causes early memory exhaustion on large
problems. Our problem is the following: this allocation method limits the size
of problems we are able to tackle.

Since the task scheduler knows what the next tasks to be scheduled are, it also
knows what the next MPI communications to be performed are. We can use this
knowledge to delay the receive buffer allocations until when they will actually
be useful. This can reduce the number of buffers allocated simultaneously and
allow reusing buffers. Consequently, memory exhaustion can be avoided.

On top of solving the memory issue on the receive side, the sender side can also
be improved. When the receive buffer allocation is triggered on the receive
side, the memory registration step of the communication can be started on the
send side.

The networks we use, e.g. InfiniBand, are driven directly from the user space,
using OS bypassing. However, the network cards work with physical addresses
while the user only manipulates virtual ones. Therefore, a memory registration
step is required in order to give the network card the physical addresses as
well as to ensure the virtual-physical address mapping does not change. This
step in communications involves a system call and asymptotically costs 10
µs/MiB. Once again, the knowledge of the task graph can be used to perform the
memory registration step in advance, in parallel of computation, thus removing
it from the communication's critical path.

In practice, the memory registration as well as the receive buffer allocation
can both be triggered when the task that computes the data to be transferred is
about to be scheduled.

This work first aims at lifting the memory limit thanks to a more efficient
allocation method. Then, removing memory registration from communication
critical path aims at improving communication performance. The latter is
expected to have most impact on medium-sized problems, where the amount of
computation is not big enough to allow easy communication-computation overlap.

The rapid expansion of IoT devices, edge systems, cloud platforms, and high-performance computing is reshaping how hyper-distributed applications are designed and orchestrated. In the Compute Continuum, centralized orchestration approaches become complex due to heterogeneity, geographic dispersion, and dynamicity. Decentralized coordination, where autonomous agents cooperate to achieve global objectives, is highly beneficial in this context.

In this talk, I present the application of a consensus-driven approach for the decentralized operation of hyper-distributed services. Unlike prior work applying consensus to job selection, we extend it to swarm-like environments, where agents autonomously decide which service functionalities to execute based on their capabilities and real-time quality-of-service metrics. Functionalities can be elastically activated or terminated as application needs evolve, enabling adaptive service orchestration.

Our implementation builds on COLMENA, a programming framework that transforms devices into autonomous agents. COLMENA defines services as sets of roles and behaviors and provides a middleware stack for decentralized orchestration. By integrating consensus into COLMENA, agents can self-organize, elect local leaders, and coordinate without centralized control.

We demonstrate this approach in modern electric power systems, where distributed dynamic resources require decentralized control. Using the ANDES simulator, we model the NPCC 140-bus grid and deploy agents via COLMENA across six geographically distributed sites on the FABRIC testbed, scaling to 60 nodes. Experiments show that agents dynamically allocate roles, respond to contingencies, and stabilize grid frequency with low overhead.

Eascale HPC supercomputers (Aurora, JUPITER, Alice Recoque) as well as AI factories (Equinox, Solstice) all utilize similar foundations: they are sets of compute nodes each comprising multiple CPUs, GPUs, and memories. Delivering performance/portable/productive parallel programming environments on such architectures is a challenge. While C, C++, and Fortran remain the bedrock of HPC, Python has become the primary language for AI/ML workloads, and Julia is gaining ground in scientific computing. Python 3.13 now includes an option to remove the Global Interpreter Lock (GIL, PEP 703), and its compiler technologies (Numba, Triton, etc.) are evolving. Julia integrates an LLVM compiler capable of targeting GPUs using just-in-time (JIT) compilation with a built-in tasking runtime system to express parallelism. These simultaneous advancements open the doors to a new era of parallel programming natively in high-productive languages.

In this short talk, I present the recent work of our group at Argonne on designing parallel programming environments in Python and Julia for multi-device systems. I will introduce XKRT - A low-level C++ parallel runtime system assisting memory management on multi-device architectures, and two programming environments built upon it:
- Drava - An event-based and function-as-a-service infrastructure that enables flexible programming of scientific edge experiments (e.g., detectors) in Python.
- XK.jl - A Julia package for parallel programming that includes a BLAS module we used to accelerate the Krylov.jl solvers on multi-GPUs.

We are seeking collaboration opportunities on
1) Real-time data processing pipelines for high-memory throughput detectors, including streaming, batching, and low-latency inference at scale.
2) Assisted-parallel programming of multi-GPU systems, including memory management and task scheduling.

Periodic dynamic load balancing is an important tool for several classes of applications, including particle simulations in astronomy and other areas, or adaptive mesh refinements in many domains. Common static load balancing methods such as repartitioning meshes or resorting the entire set of particles are very expensive. A promising idea is to use overdecomposition, where the application data and work is partitioned into chunks, with the number of chunks significantly larger than the number of execution units (which could be nodes, cores or individual GPGPU devices). With that, the problem reduces to that of migrating these chunks dynamically, and handling the associated dynamic location table. This talk will describe the broad challenges and classification of strategies, and propose a common framework that can be used by multiple applications, languages and frameworks (such as AMREx) without requiring committing to Charm++.

In many applications, the principle of persistence applies: the communication patterns and computational load, once they are expressed in terms of the logical chunk decomposition, tend to persist over time. In other words, the recent past is a good indicator of near future performance. This means that an introspective measurement system can keep track of loads while computation occurs and communication patterns while messages are being sent. At other times, such as right after dynamic refinements, the measurements may not be as useful, but the application can still provide load metrics. Communication can be instrumented directly, or when that is challenging (or provides too much data), one may use coordinate information provided by the application with the assumption that nearby objects communicate more.

These instrumentation approaches can then be coupled with a suite of load balancing decision strategies that decide how to map chunks to processors. In Charm++, we have developed many such strategies over the years. Different strategies are useful in different use-cases. A “diffusion” strategy being currently developed builds upon previous work to optimize both communication and minimize load imbalance.

While Charm++ has an extensive dynamic load balancing capability, one must use the Charm runtime and rewrite their code in Charm++ to use it. Therefore, we propose creating a common load balancing framework that can be plugged into other software libraries and runtimes. Charm will just be one of the clients of this common framework. Darma/vt being developed at Sandia at Livermore by Lifflander et al is another such client.

Recent SmartNICs consist of programmable hardware as FPGA, CPU cores or an array of packet processing cores.

BlueField DPUs consist of general purpose processing ARM cores. NVIDIA ConnectX devices has an array of packet processing cores.

Such devices can be programmed using specialized vendor libraries specific to network programming and unfamiliar to scientific programmers.

We propose adoption of existing programming models of MPI and PyTorch to leverage the capabilities of the advancement in SmartNICs for accelerating HPC and AI applications.

LAPACK provides routines for solving systems of simultaneous linear equations, least-squares solutions of linear systems of equations, eigenvalue problems, and singular value problems. We will describe our current and future work on diffLapack, a library of differentiated LAPACK routines. We have previously differentiated a nuclear energy density functional code that employs reference BLAS and LAPACK routines. Based on this experience, we first created diff-BLAS, a library that contains differentiated BLAS routines generated using the automatic differentiation tool Tapenade. diff-BLAS employed AI to generate the invocations to Tapenade for each routine as well as the testing and build system. In diff-LAPACK, we propose to use a higher level of abstraction to generate the differentiated routines. In this effort, we are using AI to generate the differentiated code from known derivative formulae for the numerical routines. We are interested in collaborating on generating and deploying performant, parallel versions of these libraries.

The structure of eigenfunctions can be used to describe many phenomena in physics. We are considering the eigenfunctions of the negative Laplacian with homogeneous Dirichlet boundary conditions for a bounded domain. These eigenfunctions can be used to describe the vibration of plates and membranes. Their nodal lines are of special interest. These are the sets of points where no vibration exists. According to Payne's conjecture, the nodal line of the second eigenfunction of the negative Laplace operator would always touch the boundary. The aim of our work is to reject numerically Payne's conjecture for special domains including the least amount of holes.

To achieve this, we solve a partial differential equation (PDE) using the boundary element collocation method and solve the resulting nonlinear eigenvalue problem numerically using contour integrals. This leads to large matrices, whose entries are integrals. These integrals have to be numerically approximated. Additionally, standard numerical linear algebra methods such as solvers for singular value decomposition, linear eigenvalue problem, and linear equation system have to be used.

Current numerical results show domains with at least six holes as a counterexample in two dimensions. We numerically verified with our new developed, efficient, parallelized solver using MPI4py on CPU on JUSUF that domains with less than six holes reject the conjecture.

In the future, we want to find counterexamples in 3D, since no numerical results are presented yet. Due to the substantially larger matrices, however, we will require significantly more memory and incur higher computational costs. This is why we want to parallelize it on GPUs using mixed precision.

However, this raises open questions regarding the effects of mixed precision on numerical stability and the reliability of the results.

The ExaNLA (Exascale Numerical Linear Algebra) collaboration is an emerging, community-driven initiative focused on coordinating the development of high-performance, scalable, and portable dense numerical linear algebra (NLA) capabilities for exascale and GPU-accelerated computing systems. Motivated by the increasing computational demands of large-scale scientific simulations, data analytics, and machine learning, ExaNLA targets dense factorizations, solvers, and eigensolvers as critical computational building blocks.

Adopting an application-driven perspective, the initiative aligns algorithmic design, software architecture, and benchmarking strategies with real-world workloads. It aims to establish a sustainable dense NLA ecosystem optimized for heterogeneous architectures—including multi-core CPUs, GPUs, and distributed-memory systems—while promoting interoperability, performance portability, and resilience.

This talk will provide a high-level overview of ExaNLA, including its organizational structure, working groups, and progress to date. The collaboration operates under an open-source model, encouraging broad participation across universities, national laboratories, and computing centers. Its three primary activity areas are:

1. Algorithmic and numerical foundations – scalable dense linear algebra methods for accelerated architectures;
2. Software architecture and interfaces – programming models, abstraction layers, and maintainability for long-term sustainability;
3. Benchmarks and application integration – performance evaluation based on realistic workloads and guidance for optimization priorities.

The session will highlight current coordination efforts, early design discussions, and emerging benchmarking concepts. As ExaNLA is still in a formative stage, several strategic and technical questions remain open. The presentation aims to stimulate discussion within the JLESC community, identify alignment with related initiatives, and explore opportunities for collaboration.

Previously, CFD simulations were performed to study the human respiratory system and assist in nasal cavity surgery planning [1,2]. The simulation pipeline was further augmented with ML methods to automatically segment boundary regions [3] and to improve the quality of nasal cavity surfaces [4]. This study extends previous work, i.e., it includes an external flow region and performs unsteady simulations of particle inhalation with the aim to quantify infection risks. Therefore, the probability of outside particles either entering deep into the nasal cavity, being filtered, or not being inhaled at all is computed.
The mesh is comprised of 24 million cells and the m-AIA simulation framework [5] is used with a combined lattice-Boltzmann and Lagrangian particle tracking approach. Simulations are run on 2,048 CPU cores of JURECA-DC1 and 60,000 particles are uniformly initialized in a cubic region of 512 (83) cm3 outside the nostrils. The particle diameter is sampled from a uniform discrete distribution of E−6, . . . , E−1 mm. A sinusoidally varying velocity boundary condition is applied at the esophagus boundary for 2.5 s, reaching a maximum inhalation rate of 0.5 l/s at 1.25 s and settling back to 0 at 2.5 s, taking around 160,000 time steps in total. It is observed that large particles of 10−1 mm diameter are successfully filtered by the nasal cavity. Additionally, it is found that all inhaled particles were initialized at most 70 mm away from the nose. This means that keeping the neighborhood of the nose well ventilated should be prioritized over ventilation of the outer space to reduce viral inhalation risks.
[1] A. Lintermann, M. Meinke, and W. Schröder, Fluid mechanics based classification of the respiratory efficiency of several nasal cavities, Comput. Biol. Med., Vol. 43, no. 11, 1833–1852, 2013.
[2] M. Waldmann, M. Rüttgers, A. Lintermann, and W. Schröder, Virtual Surgeries of Nasal Cavities Using a Coupled Lattice-Boltzmann–Level-Set Approach, J. Eng. Sci. Med. Diagn. Ther., Vol. 5, no. 3, 2022.
[3] M. Rüttgers, M. Waldmann, W. Schröder, and A. Lintermann, A machine-learning-based method for automatizing lattice-Boltzmann simulations of respiratory flows, Appl. Intell., 52, no. 8, 9080–9100, 2022.
[4] X. Liu, M. Rüttgers, A. Quercia, R. Egele, E. Pfaehler, R. Shende, M. Aach, W. Schröder, P. Balaprakash, and A. Lintermann, Refining computer tomography data with super-resolution networks to increase the accuracy of respiratory flow simulations, Future Gener. Comput. Syst., Vol. 159, 474–488, 2024.
[5] A. Lintermann, M. Meinke, and W. Schröder, Zonal Flow Solver (ZFS): a highly efficient multi-physics simulation framework, Int. J. Comput. Fluid Dyn., 34, no. 7-8, 458–485, 2020

We describe and demonstrate the use of CIVL to verify the correctness of scientific software writtten in Fortran and/or C with MPI and/or OpenMP. The CIVL tool performs formal verification usign a combination of symbolic execution and model checking. We use PETSc and MPICH as exemplar applications. We describe some of the advantages of using CIVL, including the similarity to traditional software testing, and some of the limitations in using CIVL.

This presentation focuses on two applications of theory from complex analysis for modern scientific computing purposes.

The first application builds on the work of Jithin George in the field of complex time integrators [1,2]. Traditional numerical time integrators consider only real-valued time steps. By extending time stepping into the complex plane, one can improve both stability and accuracy. We have demonstrated clear computational advantages for complex-valued systems. For quantum systems, such as the Schrödinger equation, we have shown that complex time integrators are uniquely optimal. Our current goal is the practical implementation of these ideas on state-of-the-art computing architectures and their application to realistic equations for simulating quantum dynamics, such as the time-dependent Kohn–Sham equations. This work is a natural extension of a previous JLESC project involving Emil Constantinescu, namely the QMD project [3].

The second application focuses on the understanding and interpretation of Electrochemical Impedance Spectroscopy (EIS) data. EIS is a non-invasive technique used to probe the internal behavior of material devices such as batteries and transistors. It is therefore particularly useful for evaluating candidate materials for neuromorphic devices. Standard EIS analysis relies on strong modeling assumptions and can lead to ambiguous or erroneous interpretations. Recently, Jithin George and Valerie Taylor introduced a framework based on numerical complex analysis that enables more robust interpretation of EIS data [4] without assuming a model. Given JLESC’s focus on neuromorphic computing, this framework shows strong potential for interdisciplinary collaboration.

[1] George, Jithin D., et al. "Explicit complex time integrators for stiff problems." arXiv preprint arXiv:2601.07730 (2026).
[2] George, Jithin D., Samuel Y. Jung, and Niall M. Mangan. "Walking into the complex plane to" order" better time integrators."

[3] https://jlesc.github.io/projects/qmd_project/

[4] George, Jithin D., et al. "Robust interpretation of electrochemical impedance spectra using numerical complex analysis."

BSC-CNS’s AI Factory is still at its early stages, beyond the question of building an AI factory the main current challenges are how AI Factory can be adopted at scale and in compliance with the EU rules (still not fully defined).

There are still many different governance challenges, ranging from properly handling data (personal, sensitive and data with restrictive licenses or without licenses) to enabling trustworthy and compliant AI (services needs to be aligned with the AI Act including risk classification, transparency requirements while enabling rapid experimentation). This talk tough will focus on the technical and infrastructure challenges and how to drive adoption for the AI Factories based on our experience at BSC-CNS.

HPC transformation: AI Factory depends on upgrading current infrastructure and turning it into a more accessible interactive and flexible service environment beyond classical HPC jobs. AI Factory’s use cases may require very different types of data, models and applications with specific latency/throughput requirements. AI Factories will need to provide services not only for training but also serving large models (support batch and interactive inference), optimized software solutions or integration for domain-specific tools.

Driving Adoption: A core objective is to “democratize” access to AI and HPC for SMEs (Small and Medium Enterprise) and startups. Quite often these organizations lack the in-house technical knowledge, stable funding or a clear problem definition beyond a product idea. Thus turning access into effective usage will become a major challenge.

Identifying performance bottleneck in a parallel application is tedious, especially because it requires analyzing the
behaviour of various software components, as bottlenecks may have several causes and symptoms. Depending on the problem, it requires monitoring several software components, such as MPI, the task-based scheduling runtime system, or the OpenMP runtime. There are a variety of performance metrics which may reveal the source of a performance problem.

Detecting a performance problem means investigating the execution of an application and applying several performance analysis techniques. Tracing tools such as Tau, Score-P, EZTrace, or HPCToolKit allow to run the application once and collect evidence that is stored in an execution trace.
Then, the developers may conduct a forensic analysis of performance on this trace to find the component or the behaviour that degrades the performance.

Several challenges emerge from the generation and use of traces. Tracing applications may alter the performance of the application, and can create thousands of heavy trace files, especially at a large scale. Most importantly, the post-mortem analysis needs to load these thousands of trace files in memory, and process them. This quickly becomes impractical for large scale applications, as memory gets exhausted and the number of
opened files exceeds the system capacity.

In this presentation, we use Pallas, a generic trace format tailored for conducting various post-mortem performance analysis of traces describing large executions of HPC applications. We show that Pallas traces allow for faster - and thus, more interactive - post-mortem trace analysis compared to other evaluated trace formats. These anaysis can be performed using very little ressources, and in few lines of code, as Pallas provides a Python API that is compatible with Numpy, Pandas, and Matplotlib. Overall, the Pallas trace format allows an interactive analysis of a trace that is required when a user investigates a performance problem. We hope this interactivity will allow developers to profile and debug their application more efficiently.

Many projects require portability across various HPC systems. For GPU applications, this entails optimizing code for both the AMD and NVIDIA architectures. Analyzing the performance is quite different for each platform however. There are 3 main hurdles: 1) you need different applications for collecting performance metrics, 2) they have different output formats that need to be analyzed, and 3) the GPUs have different hardware constructs. Additionally, there is also no easy-to-understand pointer with "your performance problem is here".

BRAVAS is a portable, state-of-the-art GPU profiling tool designed with novel analysis capabilities to bridge these portability issues. It is intended for deployment across all major EuroHPC systems, providing a unified interface for profiling both NVIDIA and AMD GPUs. To achieve this, BRAVAS incorporates an internal model that detects the underlying system environment and selects the appropriate vendor-specific profiling tools accordingly. The collected profiling data is then translated into a common, vendor-agnostic format. This standardized output enables the development of a single set of post-processing scripts, facilitating consistent performance analysis and direct comparisons across different GPU platforms. Additionally, BRAVAS will support a flexible interface for defining problem sizes and MPI execution models, allowing users to profile a wide range of applications.

We propose a talk that presents exaCB as the backbone of continuous, CI-driven
system benchmarking at JSC. The talk will show how exaCB connects lightweight
command-line tooling, reusable GitLab CI/CD building blocks, and established
benchmark harnesses into an extensible workflow that can scale from single
application tests to system-wide studies on leadership-class machines. A central
theme is modularity through a shared protocol and data model: components can
be exchanged or site-adapted without breaking reporting or analysis, enabling
application teams and system operators to collaborate on benchmarking while
preserving comparability over time.

Using concrete examples from JUREAP and ongoing JUPITER preparation, we
will demonstrate how exaCB is used in practice to orchestrate and collect results
across a large and heterogeneous benchmark portfolio. We will highlight the
incremental adoption model—starting from “runnability” and evolving toward
instrumentation and full reproducibility—and how this supports rapid onboarding
without sacrificing auditability. Finally, we will outline the integration of
the JUPITER Benchmark Suite into exaCB to bring procurement-grade workflows
(JUBE-based, with reference results) into continuous execution, enabling
system-wide trend tracking, energy-aware evaluations, and reproducible
benchmarks that remain actionable across software and hardware updates.

As applications struggle to make use of increasingly heterogeneous compute nodes, maintaining high performance for the whole platform becomes a challenge. Alongside the growing complexity of scientific workloads, this extreme heterogeneity is also an opportunity: as applications dynamically undergo variations in workload, due to phases or data/compute movement between devices, one can look for dynamic adjustments to the platform (frequency scaling, power capping, resource arbitration) or the application behavior (placement, movement, data transformation) to improve overall performance. NRM is a software infrastructure enabling the deployment of adaptive control policies along applications. By allowing users to observe at runtime their application performance and trigger actions in response, we will showcase how NRM can be used to improve the performance of applications and the energy efficiency of production systems.

Do you know if your system performance has dropped since the last software update? For many administrators and developers, this is a surprisingly difficult question to answer. While continuous benchmarks may run in the background via Cron or CI/CD pipelines, the results are often buried in isolated log files, artefacts, or scattered repositories. Without a unified way to visualise this data over time, critical performance regressions and "silent failures" go unnoticed.
In this lightning talk, we present a solution to this visibility gap: a centralised, automated dashboard built within the open-source reporting platform LLview [1]. Our framework introduces a novel architecture that strictly separates the execution of benchmarks from their visualisation. This allows researchers to run tests wherever they prefer - on HPC clusters, cloud runners, or Quantum hardware - while the dashboard automatically "pulls" and aggregates the results from repositories. By using simple YAML configuration files, users define exactly what to measure, how to group traces, and how to validate data, without writing a single line of frontend code.
We will demonstrate the flexibility of this framework through two diverse use cases: tracking standard HPC metrics (such as runtime or bandwidth) on supercomputers and monitoring the stability of Quantum Processors (QPUs). We show how the same tool visualises application-driven quantum experiments (such as Bell state fidelity and error rates) allowing operators to track hardware drift over time. Join us to see how to turn scattered logs into interactive insights, empowering both operators to maintain system health and users to verify application stability.
[1] https://llview.fz-juelich.de

Large-scale GPU-based supercomputers increasingly support AI workloads, yet a persistent fraction of resources remains underutilized due to scheduler fragmentation and unfillable node-time gaps. Our prior work, FreeTrain and MalleTrain, demonstrated that malleable deep learning training can effectively harvest these idle resources without impacting traditional batch workloads. In this work, we extend this philosophy from training to large language model (LLM) inference, addressing the unique challenges posed by latency sensitivity, statefulness, and service-level objectives.

We present an adaptive LLM inference framework that opportunistically utilizes scheduler-exposed idle GPU resources on leadership-class HPC systems, with inference workers that are fully preemptable and yield immediately to primary batch workloads. The framework operates entirely at the application and runtime level and does not modify, bypass, or interfere with the batch scheduler in any way. Building on insights from FreeTrain/MalleTrain, our approach treats inference workers as elastic and preemptable, while anchoring model state using a disaggregated serving architecture. Specifically, we decouple the KV-cache from compute by hosting cache shards on stable, policy-compliant resources (e.g., reserved nodes or long-lived services), while dynamically deploying prefill and decode workers on idle or short-lived nodes. This design enables rapid scaling, graceful preemption, and efficient reuse of otherwise wasted GPU cycles.

We evaluate our approach through extensive profiling and experiments with the vLLM framework on the Polaris supercomputer. Our results show that adaptive placement and disaggregation allow us to maintain target service-level objectives while substantially improving overall GPU utilization. Importantly, the framework operates entirely at the application and runtime level, requiring no changes to the batch scheduler, and incurs no interference with production HPC workloads.

Conceptually, this work generalizes the FreeTrain/MalleTrain model from malleable training to malleable inference, highlighting a broader opportunity for AI services that can tolerate controlled preemption and elasticity. We argue that such opportunistic inference is particularly well suited for AI-for-Science pipelines, interactive analysis, and hybrid HPC–AI workflows.

This contribution aims to initiate collaboration within JLESC around disaggregated AI services, resilient inference, and cross-layer scheduling strategies for extreme-scale systems.

We present an NVShmem-distributed octree for hierarchical domain decompositions using uniformly resolved grids of multiple depths. Storing parent nodes yields a multi- layer octree that is particularly well suited for applications requiring scalable, multiply-resolved decomposition on heterogeneous GPU systems. We store application-required data contiguously in different resolutions. The implementation is optimized for modern high-performance GPU computing environments. It is fully GPU-aware and supports distributed computing via SHMEM-based one-sided communication for efficient halo exchange. This enables scalable performance across multiple GPUs and compute nodes with minimal communication overhead. Our library is implemented as a header-only C++20 and CUDA template framework. It is modular by design, allowing user-defined data storage, different space-filling curves (e.g., Hilbert, Morton, or striped variants). The index datatype is also customizable, ensuring portability across both low- and high-bit architectures as well as arbitrary tree depth.

Molecular dynamics (MD) simulations have relied heavily on high-performance computing (HPC) resources for decades. For long-range Coulomb interactions—the de facto standard in MD—the Particle-Mesh Ewald (PME) method remains dominant. With its near-optimal O(N log N) runtime complexity, PME enables efficient time steps on the millisecond scale and is widely supported across CPU and GPU architectures. However, its O(p²) communication overhead, stemming from internal Fast Fourier Transform (FFT) operations, poses a significant bottleneck.

In this work, we explore a viable alternative: the Fast Multipole Method (FMM), a long-range solver with linear runtime and communication complexity, making it a compelling candidate to overcome current performance limitations. Historically, energy conservation errors in tree-based FMM approaches have constrained its adoption. Here, we present recent advances that mitigate these challenges, including:

• Reduced energy drift through refined numerical formulations,
• Improved numerical stability at lower precision levels, and
• Lowered accuracy complexity without sacrificing fidelity.

We benchmark FMM against PME-based simulations and discuss scenarios where FMM may emerge as the superior choice, particularly in large-scale or communication-bound systems.

Growing simulation fidelity and an explosion of affordable and high-resolution sensings devices are driving the exponential growth of data handled by HPC systems. Especially the rise of machine learning applications, but also other large-scale data analysis tasks, impose workload patterns on existing storage solutions that lead to large but avoidable data copies and transfers and contention near storage devices and in the network. A promising solution for many workloads that need to aggregate across large volumes of data is computational storage. Instead of moving the raw data to compute nodes, the programs are distributed to storage nodes and devices. While the idea is not new, computational storage poses a co-design challenge that requires bringing together voices from different stakeholders including the application sides, middleware developers as well as hardware designers and vendors.

As applications are becoming easier to decompose, and industry is converging on different industry standards, such as a common device API as proposed by the Storage Networking Industry Association (SNIA), it is essential for the HPC community to consider opportunities but also raise challenges and needs to ensure interoperability with applications, workflows, middleware and systems.

In this talk we will give an overview of current work in progress and research activities on hardware acceleration computational storage functions and middleware and programming paradigms to leverage computational storage for scientific applications and workflows.

We present an automated RTL tetsing workflow for PCAComp (Principle Component Analysis-based compression hardware), a lossy compressor used in scientific data compression for near-sensor and on-chip processing. The proposed framework supports CPU-side testing via Verilator, which is currently implemented, as well as GPU-side testing using NVIDIA GEM for GPU-accelerated RTL simulation, which is under active development. A unified automation pipeline enables reproducible testing across platforms, while a JSON-driven configuration system allows flexible evaluation across different hardware configurations. The testing infrastructure bridges Scala-based Chisel hardware design with Python-based simulation, enabling seamless integration between hardware generation and verification. This work addresses verification bottlenecks in developing GPU-acclerated hardware for HPC applications, providing a scalable approach to multi-platfom RTL veriifcation for scientific computing workloads.

AI-assisted chip development is gaining attention as hardware complexity grows and traditional design productivity becomes a bottleneck. This talk gives a brief summary of AI usage in chip development, including areas such as RTL code generation, verification, layout optimization, feature selection, and design-space exploration. I will discuss representative RTL and verification benchmarks, highlighting the current quality of LLM-generated hardware code and the remaining gaps. I will also share practical observations from using LLMs for Chisel-based prototyping, including benefits, limitations, and code quality issues. The goal is to provide a grounded view of current capabilities and future directions for AI-assisted chip development.

The renewal pace for supercomputers no longer seems sustainable economically, environmentally, or socially.
We can already observe a slowdown in this replacement frequency. In this talk, we will present Inria's initiative on the scientific issues arising from extending the lifespan of supercomputers.
We believe that this initiative can find its rightful place within JLESC. It is a challenge within most of the topics: with needs from an architecture perspective, from programming languages and performance tools.

In this talk, I would like to introduce the activities of the Materials Science Application Interface Platform Development Unit at RIKEN R-CCS. Our mission to utilize to Large Language Models (LLMs) to accelerate productivity in scientific research in materials science. In particular, I will introduce a concrete example of an MCP server enabling LLM control of simulations of chemical reactions. I hope that this talk will open up discussions with groups with similar aims, and that we might combine our efforts to tackle real problems in materials science.

Error-bounded lossy compression is increasingly essential for reducing the storage and I/O costs of extreme-scale scientific and AI workloads. In this talk, I will present a brief update on recent advances in the SZ framework, highlighting selective papers accepted this year by top venues including IPDPS, VLDB, and CCGrid. On the scientific data side, we introduce quantization-aware interpolation to mitigate artifacts in pre-quantization compressors (IPDPS’26), and discuss Eureka (VLDB’26), which enables fine-grained access and efficient range queries on compressed data through data-index co-compression. I will also present extensions of error-bounded compression to emerging AI applications, including PackKV for reducing LLM KV-cache memory footprint (IPDPS’26) and EmbdC for error-bounded video embedding compression in on-device inference (CCGrid'26).

Today’s scientific workflows often exhibit dynamic behaviors, where
data and resource requirements of tasks evolve over time. We explore integrating control theory in HPC workflows to enable dynamic workflow control and optimization for minimizing end-to-end execution time. In this talk, I will present our data-driven control framework that adapts the workflow using extremum seeking control algorithms based on the real-time workflow behavior, in particular the idle
time of workflow tasks. I will present our results from both synthetic benchmarks and science use cases which demonstrate that enabling dynamic workflow control and optimization can bring significant time savings in scientific workflows exhibiting
dynamic patterns.

SIONlib is an open source parallel-I/O library that is developed internally in Juelich Supercomputing Centre. SIONlib’s I/O subroutine is implemented via POSIX and standard C APIs, instead of relying on MPI I/O APIs. The library aims to enable performant funneled-I/O access pattern, generating small number of physical shared-files while supporting task local file-like access.

One of the core features in SIONlib that helps achieve the stated aim is the alignment of the generated physical files to the parallel filesystem’s file-system block, which reduces the impact of file access contention with multiple tasks’ attempts to write in the same block. The I/O library is also unique in the aspect that it allows concurrent OpenMP thread-level I/O, allowing parallel processes to spawn threads to handle the I/O operations. Coinciding with the noticeable shift towards the use of accelerators in computational codes in the past few years, this creates an untapped potential of offloading I/O workloads to unused node-local CPU hardware resources to hide I/O cost.

The library had been tested with 1.8M tasks across ~28k JUQUEEN compute nodes, writing ~500 shared files in the process. Development efforts continued and there is a renewed push towards an official version 2 release of SIONlib I/O library. Synthetic data is mainly used for the purposes of performance benchmarks at the moment and scalable I/O can be demonstrated in both pure OpenMP and hybrid MPI+OpenMP test cases. Further efforts in field-testing the library will be helpful in exploring the potential use-cases and speedup that can be achieved in production codes.

Next-generation agentic workflows have transitioned from simple inference loops into complex, stateful Directed Acyclic Graphs (DAGs) that operate as high-frequency dynamic control planes. As these agents leverage the Model Context Protocol (MCP) to interface with a heterogeneous array of LLMs, LVMs, and specialized scientific simulators, the orchestrator must manage massive concurrency across distributed compute clusters. The primary architectural challenge in scaling these systems is the segregation of tool outputs into lightweight control-plane metadata used for logical branching and heavyweight data-plane artifacts, such as high-resolution vision traces, multi-gigabyte datasets, and comprehensive reasoning logs.

The bottleneck in existing agentic frameworks, such as Langgraph, stems from a reliance on conventional RDBMS backends like Postgres for state persistence. While sufficient for transactional metadata, these engines introduce significant serialization overhead and locking contention when tasked with ingesting multi-modal binary large objects (BLOBs) under high-concurrency loads. This architectural mismatch creates an I/O wall that hinders sub-millisecond suspend-resume cycles, high-fidelity record-replay for provenance, and seamless Human-in-the-Loop (HITL) integration. In high-performance computing (HPC) environments, this translates to underutilized accelerators and increased latency floors for long-running autonomous workflows.

Our proposed checkpointing framework addresses these scaling limitations by decoupling the capture of control and data planes through a tiered, asynchronous persistence architecture. By integrating directly with Langgraph, we offload heavy data-plane artifacts to high-throughput DataStates/VeloC checkpoint engines, while maintaining control-plane state in indexed, low-latency, key-value stores. This approach utilizes zero-copy mechanisms to minimize memory bus contention during the logging of intermediate tool outputs and reasoning traces. Our evaluation demonstrates that by optimizing the persistence layer for multi-modal telemetry, we can achieve an order-of-magnitude improvement in system throughput, ensuring that the orchestrator I/O does not become a bottleneck even as the volume of scientific and commercial artifacts scales.

The advent of complex AI workflows that involve large learning models (training using data/pipeline/tensor parallelism, retrieval augmented generation, chaining) has prompted the need for scalable system-level building blocks that enable running them efficiently at large scale on high end machines. Of particular interest in this context are data management techniques and their implementation that bridge the gap between high-level required capabilities (fine-grain tensor access, support for transfer learning and versioning, streaming and transformation of training samples, transparent augmentation, vector databases, etc.) and the existing storage hierarchy (parallel file systems, node-local memories, etc.). This talk discusses the challenges and opportunities in the design and development of such techniques and presents several results related to training (checkpointing, offloading), inferences (KV caching) and agentic workflows (vector databases, agentic memory)

The analysis of execution traces is an active field in the HPC I/O community. And for good reason: it is the best way to obtain a comprehensive view of the I/O behavior of HPC applications, even though this analysis is post-mortem and sometimes based on datasets that are several years old. In several of our studies, we have proposed methods for analyzing and detecting access patterns with aspects of temporality or periodicity for instance. This research has given us a better understanding of how applications read and write their data on large-scale storage systems. We are now exploring the research opportunities opened up by these results. In this short talk, after giving a brief overview of our recent work, we will discuss the different avenues we have identified for leveraging the characterization of I/O patterns, including I/O-aware scheduling or pattern-driven benchmarks.

This project is supported by JHPCN in Japan (Joint Usage/Research Center for Interdisciplinary Large-scale Information Infrastructures , https://jhpcn-kyoten.itc.u-tokyo.ac.jp/en/), and it has been advancing computational science by integrating "Simulation/Data/Learning (S+D+L)” on heterogeneous supercomputers such as “Wisteria/BDEC-01 (U.Tokyo)” and “Miyabi (JCAHPC)”, along with "mdx" since FY.2021 with international partners from Germany, France, Croatia, USA and Japan using the innovative software platform “h3-Open-BDEC (https://h3-open-bdec.cc.u-tokyo.ac.jp/)”. In FY.2026, with FugakuNEXT in mind, we will make further promotion of Integration of (S+D+L) while developing applications in earth sciences, life sciences, and quantum sciences that efficiently coordinate CPU-to-GPU interactions on Miyabi-G. This talk overviews the project, and show some activities under collaboration between JSC and RIKEN/UTokyo, focusing on (1) Terrestrial Systems Modeling Platform (TSMP), (2) Brain Aneurysm Simulations integrated with Machine Learning, (3) ChASE with Ozaki-II.

During the last decade, a new kind of computation-intensive and complex application has emerged: Large Language Models (LLM). These applications require the computing power offered by HPC clusters and are complex to implement efficiently: several kinds of parallelisms are possible, limited available memory is often a major constraint, accelerators (GPUs, TPUs, NPUs, ...) need to schedule data transfers and computations, the problem size imposes distributed executions, ... All these challenges are already well-known by developers of the first-class applications running on HPC clusters: linear algebra, numerical simulation, ... Addressing these challenges has led to the development of task-based runtime systems, to ease the writing of HPC applications by providing an abstraction of the machine and its efficient programming. Despite task-based runtime systems being used for a long time now for classic HPC applications, they are generally not used to implement LLM applications. In this paper, we present our first experiments to analyze the relevance of using task-based runtime systems for LLM applications (both training and inference). We describe our implementation of a small LLM with StarPU, discuss the different choices we had to make, evaluate performance and summarize helpful and missing features of StarPU to implement an LLM.

We present an automated RTL tetsing workflow for PCAComp (Principle Component Analysis-based compression hardware), a lossy compressor used in scientific data compression for near-sensor and on-chip processing. The proposed framework supports CPU-side testing via Verilator, which is currently implemented, as well as GPU-side testing using NVIDIA GEM for GPU-accelerated RTL simulation, which is under active development. A unified automation pipeline enables reproducible testing across platforms, while a JSON-driven configuration system allows flexible evaluation across different hardware configurations. The testing infrastructure bridges Scala-based Chisel hardware design with Python-based simulation, enabling seamless integration between hardware generation and verification. This work addresses verification bottlenecks in developing GPU-acclerated hardware for HPC applications, providing a scalable approach to multi-platfom RTL veriifcation for scientific computing workloads.

The continued miniaturization of semiconductor devices has pushed characteristic length scales into the nanometer regime, where quantum mechanical effects dominate electronic, chemical, magnetic, and mechanical behavior. Density Functional Theory (DFT) provides a reliable and predictive framework for such systems, but conventional eigenvalue-based formulations scale cubically with system size and become computationally prohibitive for realistic nanoelectronic devices containing millions of atoms. In addition, the global communication patterns inherent to eigensolvers limit scalability on modern massively parallel high-performance computing (HPC) architectures.

Linear-scaling electronic structure methods offer a promising alternative. Density-matrix-based approaches achieve linear scaling by exploiting the nearsightedness of electronic matter, but they rely on a finite band gap and are therefore largely restricted to insulating systems. Metallic systems and semiconductor devices with conducting leads remain challenging. Green’s function-based DFT overcomes this limitation by enabling linear scaling through spatial truncation of long-range interactions while remaining applicable to metallic systems.

In this work, we present AngstromCube, a real-space Green’s Function Density Functional Theory (RSGF-DFT) application designed explicitly for large-scale GPU-accelerated HPC platforms. Instead of solving the Kohn–Sham eigenvalue problem, AngstromCube computes the time-independent Green’s function of the effective single-particle Hamiltonian. The electron density is obtained from the imaginary part of the diagonal Green’s function via the Kramers–Kronig relation, eliminating explicit band summations. The method requires contour integration in complex energy space, with sampling strategies informed by established techniques from the Korringa–Kohn–Rostoker multiple scattering community.

To achieve plane-wave-level accuracy, all operators are represented on a uniform Cartesian real-space grid using high-order finite-difference stencils, with derivatives up to 16th order supported. Linear scaling is achieved by truncating the Green’s function beyond a finite spatial radius, introducing a second key convergence parameter in addition to the grid spacing. The resulting computational cost exhibits strong sensitivity to both parameters, motivating ongoing work on optimizing the prefactor and identifying crossover points where the linear-scaling approach becomes more efficient than conventional cubic-scaling DFT.

AngstromCube employs the Projector Augmented Wave (PAW) method for electron–ion interactions. A key performance feature is the sparse treatment of non-local projector functions, which are expanded in a factorizable basis of Hermite–Gauss polynomials and evaluated on the fly on each GPU. This minimizes memory bandwidth requirements and avoids storage of large non-local operator matrices.

The core computation is a GPU-accelerated implicit Hamiltonian operator applied iteratively using the transpose-free Quasi-Minimal Residual (tfQMR) method to compute for Green’s function elements. The code is implemented in CUDA-enabled C++ with templated kernels supporting mixed precision, complex arithmetic, and multiple spin formulations. MPI-level parallelization is achieved by distributing independent columns of the truncated Green’s function across MPI tasks with customised load balancing. Mixed-precision strategies are employed to reduce time to solution while maintaining numerical stability.

AngstromCube demonstrates that real-space Green’s function DFT can deliver high physical fidelity together with true linear scaling on modern GPU-accelerated HPC systems, enabling first-principles simulations of nanoelectronic structures and a wide range of other material classes at previously inaccessible scales.

Parallel discrete event simulation (PDES) is a modeling methodology that is of key importance studying critical behaviors across many fields including science enterprise design and provisioning, internet and cybersecurity simulations, and simulations for hardware co-design. Despite significant advances in both extreme-scale computing systems and PDES modeling frameworks to take advantage of these platforms, the simulation requirements and computational complexity of PDES hardware co-design models are growing at an intractable rate. Consequently, the timescales over which these hardware co-design models operate is limited to only a few seconds of simulated wall-clock time, making long-timescale PDES simulations of future, disruptive extreme-scale infrastructures out of reach for current PDES frameworks.

We design a hybrid modeling and simulation framework, Kronos, that integrates PDES with surrogate models and demonstrate its initial effectiveness in improving hardware co-design simulations performance. Our approach involves automatically changing the modeling methodology during the execution of the simulation, switching to PDES for periods characterized by complex behaviors and switching to other modeling methodologies (such as analytical and machine learning) for periods that can be easily predicted by fast surrogates. Our efforts in this project focus on four major research objectives: (i) building a scalable workload module for hybrid simulations; (ii) creating machine-learning-driven and analytic surrogate models for PDES network and workload models; (iii) enabling online transitions between PDES and surrogate models; and (iv) automatically transitioning between models.

Along with providing an overview of this project, this poster will focus on the design of a *director* for orchestrating the activities of both the PDES and surrogate models in a hybrid simulation. The director performs three key functions. First, it transparently chooses the type of model (i.e., PDES or surrogate) used for predicting each event. Second, it provides a bidirectional communication channel between the PDES model and the surrogate model for exchanging training data and predictions between both models. And third, it can support phase detection mechanisms to determine when the simulation should be in PDES mode or surrogate mode. We demonstrate the utility of our director design by integrating it within the Kronos hybrid modeling framework and using it to drive hybrid simulations of runtime of large HPC workloads on a dragonfly network. This presentation will cover challenges encountered and strategies used in deploying our director design. It will also discuss how our approach can be applied to other simulation tools and application areas such as the design of energy efficient microarchitecture and resilient integrated research infrastructure.

This work describes a unified identity and access design for the Quantum–HPC hybrid platform that integrates quantum computers and supercomputers. The platform adopts OAuth2.0-based access tokens to enable workflows to securely access multiple computing systems. Job submission to HPC resources is performed via Slurm REST interfaces under token-based authorization. The user management component enforces identity verification procedures, partially automated through digital credential mechanisms. Separately, user information is subject to screening processes aligned with export control and security compliance requirements. The design supports secure and practical hybrid computational environments.

As we move toward the Exascale era, the computational cost of direct numerical simulations (DNSs) remains a primary bottleneck for high-fidelity fluid flow analyses. While large eddy simulations (LESs) offer a more affordable alternative, they inherently lack the sub-grid-scale (SGS) details necessary for precisely describing turbulence. To bridge this gap, this work presents an AI-driven framework leveraging Super-Resolution (SR) networks to reconstruct lost turbulent information from coarse-grained inputs. This framework exploits a computational fluid dynamics (CFD) dataset of a human larynx [1, 2], where complex, transitional fluid patterns are generated during exhalation. Understanding these dynamics is critical for medical research, as conditions such as asthma, pneumonia, and COVID-19 significantly alter exhalation by airway constriction, inflammation, mucus accumulation, or altered respiration patterns, thereby changing local geometry, flow rates, and turbulence characteristics. Moreover, advanced simulations, e.g., LES or DNS, are increasingly vital due to the fine-grained details of the fluid mechanics, which are necessary to accurately understand patient-specific flow physics and develop corresponding treatments. By adapting SR techniques originally developed in computer vision, using a Convolutional Defiltering Model (CDM) architecture [4, 5], the growing availability of high-fidelity data to learn representations of unresolved physics can be directly exploited. The CDM’s ability to capture both local and global features via skip connections makes it ideal for the SGS reconstruction of turbulent flows, even when training data is limited or noisy.

The implementation utilizes the open-source AI4HPC library [3], which is specifically optimized for deep learning on large-scale datasets, ensuring scalability in high-performance computing (HPC) environments. A two-step training strategy is employed in the CDM: (i) DNS velocity fields are processed using Gaussian filtering to generate LES-level downsampling and a corresponding low-resolution training dataset; (ii) a U-Net model is trained on this filtered data to reconstruct highly resolved velocity fields and SGS quantities. This work demonstrates the efficacy of the AI4HPC ecosystem in managing complex 3D CFD datasets and provides a scalable, AI-based alternative to traditional turbulence-closure problems. By successfully reconstructing fine flow structures, this framework not only advances turbulence modeling but also supports efficient inference in HPC applications, ultimately enabling more detailed medical diagnostics at a fraction of the cost of traditional DNS.

References

[1] S. Voss, C. Arens, G. Janiga. Flow, Turbulence and Combustion, 102, no. 1, (2019).

[2] Abdelsamie A., Voß S., Berg P., et al. Computers Fluids, 255, 105819, (2023).

[3] https://jlesc.github.io/projects/dnn_cfd/

[4] Fukami K., Fukagata K., and Taira K. arXiv preprint arXiv:2301.10937, (2023).

[5] Sarma R., Inanc E., et al. Frontiers in High Performance Computing, 2, 1444337, (2024).

A state-vector simulator of quantum computers has been developed for use on supercomputers. Our simulator, RIKEN-braket, removes the conventional limitations on the number of MPI processes and the size of the state-vector data array imposed by commonly used parallelization methods. We demonstrate that our simulator scales efficiently up to 46 qubits on the supercomputer Fugaku, using up to 55,296 computing nodes. We also describe recent enhancements to the simulator, including gate fusion and support for multiple circuits to enable simulations of variational algorithms.

Today, supercomputers are renewed every 5 to 7 years. This pace no longer seems
sustainable economically, ecologically, or socially. We are already seeing a
slowdown in this replacement frequency.
The goal of this project is to understand how these components are aging, with
the intend to model the aging process in the scope of a supercomputer. The hope
is to then be able to detect and react to the aging process.
In this poster we discuss our methodology to study the aging process. The study focuses on
individual nodes (CPUs and GPUs) including the memory contained within the node.
The study rely on two experiments done a few time a year during the life of the HPC system:
- A quantitative analysis that studies specific performance through
microbenchmarks (like stress-ng).
- A qualitative analysis with a more general benchmark that simulates the
behavior of an application (like HPL) on selected nodes (chosen by their
specificities like their location in the physical system).

Computer simulations of atomistic systems are a cornerstone of research in Physics, Chemistry, Biology and Materials Science and account for a large share of applications on the worlds supercomputers and high-performance computing clusters. Large-scale atomistic simulations rely on interatomic potentials providing an efficient representation of atomic energies and forces. Although modern machine learning (ML) potentials provide a density-functional theory-like accuracy, they are rarely used in large-scale simulations as they remain orders of magnitude slower than simple empirical potentials. Often only a small number of atoms strongly influences the correct outcome of a simulation, while the majority of atoms forms a background for proper field propagation or mechanical properties on a coarser level. Examples include bond-breaking at a crack tip for simulations of crack propagation, defect nucleation sites in simulations of plastic deformation, or reaction centres in biology. An adaptive-precision interatomic potential (APIP) overcomes the performance gap between the precise ML and the fast empirical potentials for such simulations: An APIP combines two potentials of different accuracy and computational costs to a multi-resolution description with an optimum of performance and precision in large complex atomistic systems. The required precision is determined per atom by a local structure analysis and updated automatically during simulation. Our APIP package of the molecular-dynamics simulator LAMMPS makes APIPs available to the community. A load-balancer prevents problems due to the atom dependent force-calculation times, which makes it suitable for large-scale atomistic simulations. Copper and tungsten have been used as demonstrator materials for nanoindentation simulations with embedded atom models as fast potentials and atomic cluster expansions as precise ML potentials, but in principle a broader class of potential combinations could be implemented. All ML-specific observations were reproduced by the APIPs, however, with a significant speedup of 20-30 times compared to the pure ML-potential nanoindentation simulations. The APIP-package supports conservative potentials, i.e., the system can be described by a momentum-conserving Hamiltonian. Alternatively, one can use performance-optimised APIPs that aim for the highest speedup possible and conserve energy and momentum due to local corrections. APIPs can achieve—dependent on both the combined potentials and the atomistic system—a speedup of one or two orders of magnitude compared to a pure precise simulation. Thus, the coupling of fast and precise models is very promising and allows for simulations of either much larger system sizes or diminished resource requirements at constant simulation size.

Introduction and Objectives

Modern scientific facilities, such as the SPring-8 synchrotron radiation facility, generate an overwhelming volume of data, particularly through techniques like X-ray Computed Tomography (XCT). This rapid data growth presents significant hurdles for efficient storage and high-speed transmission, necessitating the development of advanced compression techniques. While AI-based methods like TEZip have been introduced, they are often limited to time-evolutionary data and suffer from reduced accuracy because they are trained on non-scientific, general-purpose datasets.

The primary objective of this study is to design an AI-based compression framework capable of handling both time-evolutionary and non-time-evolutionary scientific images. By fine-tuning models specifically on scientific data, we aim to enhance prediction accuracy and reconstruction quality, thereby improving the overall compression ratio.

Proposed Methodology and Pipeline

We propose a multi-stage AI-based scientific image compression pipeline:

• AI Prediction Phase: The original high-resolution image is first downsampled. This downsampled image is then passed into an AI super-resolution model to produce a reconstructed image.
• Delta Image Generation: The system computes the pixel-wise difference between the reconstructed and original images to produce a delta image.
• Data Compression Phase: Both the downsampled original image and the delta image are losslessly compressed using the FFV1 video codec. This approach ensures that the original scientific data can be perfectly recovered while leveraging the AI model's predictive power.

Experimental Setup and Fine-Tuning

We use pre-trained SwinIR, a transformer-based image restoration model. And fine-tuned the model using the XCT-2K dataset from SPring-8, which contains 904 16-bit grayscale images.

• Training Details: 700 image pairs were used for training, with the remaining images reserved for testing.
• Technical Parameters: The model was trained for 300 epochs on an NVIDIA A100 GPU using a batch size of 4, the Charbonnier loss function, and an Adam optimizer with a cosine-annealing learning rate.
• Metrics: Accuracy was measured via PSNR, while compressibility was evaluated using Shannon entropy and compression ratio.

Results and Performance Analysis

The experimental results demonstrate that fine-tuning on scientific data significantly outperforms pre-trained baseline models.

• Reconstruction Accuracy: The PSNR increased from a baseline of 69.71 dB to 71.52 dB after 300 epochs, indicating that the AI model became better at predicting scientific features.
• Compressibility: The entropy of the delta images dropped from 6.4142 to 6.1457, indicating that the delta images became more compressible.
• Compression Ratios: The delta image compression ratio improved from 2.357x to 2.415x, pushing the overall compression ratio from 2.227x to 2.279x.

Conclusion

The study confirms that fine-tuning the SwinIR model with specific scientific image data effectively enhances both reconstruction accuracy and the final compression ratio. Future research will explore more efficient encoding methods for the delta image to further push the boundaries of scientific data compression.

As quantum computing hardware rapidly evolves, traditional metrics like gate fidelity and Quantum Volume are insufficient for predicting real-world utility. Researchers and industry users need objective, application-centric benchmarks to gauge when quantum processors will be ready for practical tasks. However, the lack of standardized infrastructure often leads to non-reproducible performance claims and makes it difficult to track progress across different hardware generations and technologies.
We present the JUNIQ Benchmark Suite (https://go.fzj.de/juniq-benchmark-suite-page),
a large collection of benchmark problems and a vendor-agnostic, open-source initiative provided by an independent research lab, designed to track quantum technology readiness over decades. Unlike suites focused on synthetic benchmarks, the JUNIQ Benchmark Suite emphasizes application domains. Examples include computational biology and remote sensing (Quantum SVM), logistics (Tail Assignment, TSP), and hardware diagnostics (Effective Qubit Temperature) etc. By benchmarking the same relevant problems on systems ranging from the earliest publicly available QPU devices (e.g. IBM Q Experience in 2016 and D-Wave 2000Q systems in 2017) to the latest state-of-the-art devices such as Advantage2 (2025), we provide a clear, overview of hardware maturation.
A key innovation of our work is the standardized benchmarking workflow, a CLI-based toolchain along with CI pipelines, developed to ensure strict reproducibility. This setup facilitates the entire benchmark lifecycle (setup, generation, verification and execution) while aiding dependency management and enabling CI testing. This ensures that previously generated problems remain reproducible in the future, solving the "dependency drift" problem common in the fast-moving quantum software ecosystem.
The JUNIQ Benchmark Suite hosts benchmark instances from various domains and is actively tracking performance on the latest analog and digital quantum processors available through the JUNIQ cloud platform and beyond. To foster a transparent ecosystem, we include templates and tooling that lower the barrier for community to contribute new problem instances.
Keywords: Quantum computing, Benchmarking, QPU, Quantum computing applications,

The accurate and scalable evaluation of long-range Coulomb interactions remains a central challenge in molecular dynamics, soft-matter physics and materials science, especially as simulations target exascale architectures that are characterised by complex memory hierarchies and heterogeneous computing resources. We present ScaFaCoS 2.0, an exascale-ready library that provides performance-portable implementations of the Particle–Particle Particle–Mesh (P3M) method and the Ewald summation method. These are designed to operate efficiently across diverse hardware platforms.

A primary goal of ScaFaCoS 2.0 is to achieve performance portability to a wider range of architectures without duplicating code. Implementation of electrostatic solvers and methods is based on the Kokkos programming model, enabling the library to target CPUs and GPUs from multiple vendors while maintaining high efficiency from a single source base. By delegating execution and memory management to Kokkos abstractions, ScaFaCoS 2.0 aligns with emerging exascale software ecosystems and ensures that simulation workflows are future-proofed against rapidly evolving hardware.

ScaFaCoS 2.0 also leverages interoperable, exascale-capable libraries to enhance its functionality. Thereby, Cabana manages particle data layouts and enables vectorisation and communication-aware particle operations, whereas HeFFTe provides the scalable, architecture-aware FFT capabilities required by mesh-based solvers.

In addition to portability, the library is designed around a modular execution model that enables short-range and long-range electrostatic calculations to be separated into distinct computational partitions. On HPC systems that support concurrent or heterogeneous partitioning, ScaFaCoS 2.0 enables these components to run independently. This makes it possible to assign and tune computational resources, such as CPU cores, GPUs and memory, according to the performance characteristics of each method. This separation reflects the differing algorithmic demands of real-space and reciprocal-space solvers, enabling more efficient utilisation of machine architectures, improved load balancing and flexible deployment strategies tailored to a given system or simulation workflow.

We present initial benchmarks demonstrating ScaFaCoS 2.0's performance across multiple architectures while preserving numerical accuracy and scalability. The results highlight the viability of a single, portable implementation for long-range electrostatics at scale, and demonstrate how a modular design and ecosystem integration can reduce development complexity while sustaining numerical efficiency and high performance.

With the continuous advancement of knowledge, new methods and algorithms are regularly proposed, particularly in linear algebra. Implementing them efficiently requires not only strong expertise in linear algebra but also advanced skills in high-performance computing (HPC). To simplify this process for non-HPC experts and to avoid duplication of effort, a higher-level programming model specialized for linear algebra algorithms would be highly valuable.
In this poster, we present our current approach to this challenge, centered on the Sequential Task Flow (STF) programming model. This model offers several advantages: it is relatively easy to use, as the user only needs to declare task dependencies, while still enabling high performance. However, it can be somewhat verbose in practice. On the other hand, C++ already provides more compact abstractions, such as std::future, although these are typically less performant.
Our goal is to combine the strengths of both approaches to deliver a compact, easy-to-use, and high-performance solution that minimizes required code modifications. This objective is achieved through our library, STF++.
We illustrate our approach with numerical linear algebra algorithms expressed on top of STF++, using the HPC StarPU runtime system underneath.

Partitioning data is essential to exploit the power of massively parallel machines. However, data partitioning management is still often left to application developers, who thus need to combine domain science expertise as well as HPC expertise. Some programming and execution models manage data partitioning in their models to abstract this aspect. However, this leads to duplication of the logic describing how data is partitioned between different models or libraries. This duplication especially causes problems when dealing with complex data types, such as unstructured meshes. This poster presents a model-based approach that aims at minimizing the workload of porting a data partitioning management code across various models. It details a first work that is a feasibility study of providing a unique implementation of an unstructured mesh partitioning management code across COMET as a programming model and StarPU as an execution model.

1 Quantum Computer Simulation

The state-vector method stores the full quantum state in memory and applies quantum gates as matrix–vector multiplications. In multi-GPU systems, the state vector is partitioned and distributed across devices. When gates act on high-order qubits, the corresponding operations span multiple partitions and require inter-GPU communication whose volume is comparable to the 2^n-sized state vector.

Qubit Reordering (QR) [1] alleviates this issue by dynamically modifying the mapping between logical qubits and indices so that fewer gates lead to communication.

2 Coordination in QR and GPU Peer-to-Peer Memory Access

QR requires synchronized reordering across GPUs to avoid data conflicts, which introduces non-negligible overhead, especially on systems with high communication bandwidth.

In contrast, GPU Peer-to-Peer (P2P) Memory Access, such as NVLink, enables a GPU to access another GPU’s memory directly and asynchronously without CPU involvement. This capability makes it possible to avoid QR entirely and rely instead on high-bandwidth P2P access. Based on this observation, this work proposes an alternative simulation method that eliminates QR and its associated coordination cost.

3 Exploiting Peer-to-Peer Memory Access

Gate operations in state-vector simulation consist of numerous matrix–vector multiplications over partial state vectors. The assignment of these partial vectors to GPUs largely determines P2P communication cost and overall performance.

The proposed method partitions the global state vector into contiguous segments across GPUs and defines the indices of partial state vectors for k-qubit gates using bit patterns. From these patterns, each GPU can identify the required local data and remote data to be fetched via P2P. With an appropriate index-mapping design, the method achieves a simple communication structure while entirely avoiding QR-based dynamic qubit remapping.

4  Evaluation of the Proposed Method

The method was implemented in CUDA on a machine equipped with eight NVIDIA A100 GPUs connected by NVLink (1.2 TB/s bidirectional). As a benchmark, a circuit applying Hadamard gates to all qubits was used. The proposed P2P-based implementation achieved up to an 8% speedup compared with a conventional QR-based implementation, demonstrating the practical advantage of bypassing QR.

5 Conclusions

A QR-free state-vector simulation method for NVLink-connected GPUs with Peer-to-Peer Memory Access was presented. Evaluation on an eight-A100 system showed approximately 8% improvement over a QR-based method, indicating that removing QR can be beneficial for quantum simulation on high-bandwidth GPU platforms.

ACKNOWLEDGMENTS

The author expresses sincere gratitude to Naoki Yoshioka and Nobuyasu Ito for their valuable guidance on fundamental concepts. This presentation is based on results obtained from a project, JPNP20017, commissioned by the New Energy and Industrial Technology Development Organization (NEDO).

REFERENCES

[1] K. De Raedt, K. Michielsen, H. De Raedt, B. Trieu, G. Arnold, M. Richter, Th. Lippert, H. Watanabe, and N. Ito. 2007. Massively parallel quantum computer simulator. Comput. Phys. Commun. 176, 2 (Jan, 2007), 121–136. DOI: https://doi.org/10.1016/j.cpc.2006.08.007

• Annealers are analog quantum computers that can solve only one type of problem: the Ising problem. However, there exists a one‑to‑one mapping between the Ising formulation and the Quadratic Unconstrained Binary Optimization (QUBO) problem. Since many optimization problems of practical interest can be expressed as QUBOs, annealers become promising candidates for solving them.

• A central challenge in mapping a problem to QUBO form is the encoding of constraints, because constraints cannot be directly incorporated into the QUBO or into the annealer. A careful choice of encoding is therefore crucial for the performance of the annealer.

• One of the most common constraints is the cardinality constraint, which enforces that exactly k out of n binary variables take the value 1, with the remaining variables set to 0. The standard encoding introduces a penalty term by squaring the difference between the sum of the binary variables and k, multiplied by a penalty factor, and adding this term to the objective function. Expanding this square yields coefficients for single variables and for pairs of variables, which fits naturally into the QUBO structure. However, this encoding induces all‑to‑all connectivity: every problem variable becomes coupled to every other variable. The physical connectivity of current annealer hardware is far more limited, making this standard encoding poorly suited for such architectures.

• Vyskocil and Djidjev propose an alternative encoding that uses only nearest neighbour connections and is optimized for the specific hardware topology of the annealer. In the special case k=1, information propagates along a line. As the number of variables grows, the performance of this constraint degrades because information must travel increasingly long distances.

• This is where our binary‑search‑based idea comes into play: it yields an encoding in which information can propagate in logarithmically many steps between any two points. In the general "k"-case, their method requires O(kn) variables to represent the constraint. Our adder‑based construction significantly reduces this overhead for large k, and in combination with the binary‑search structure, information still flows efficiently. The total number of auxiliary variables required—those used for the binary search plus those used for the adders—is between n for k=1 and 5*n for k=n/2. For all cardinality constraints with k>n/2, the constraint can be reformulated by summing over the negated variables.

High-resolution meteorological data are essential for accurate Lagrangian transport simulations but pose significant challenges in terms of storage, data transfer, and computational efficiency. In this study, we investigated the potential of lossless and lossy data compression techniques to reduce the data footprint of meteorological fields used in the MPTRAC Lagrangian transport model, using meteorological input from the ECMWF ERA5 reanalysis. We implemented and evaluated several state-of-the-art compression methods, including Zstandard (with and without quantization), ZFP, and SZ, applied to key meteorological variables such as wind components, temperature, humidity, and cloud properties. For each method, we assessed compression ratio, compression and decompression speed, and the errors introduced in the reconstructed data. As a practical application, we examined the impact of lossy compression on trajectory calculations performed with MPTRAC. Atmospheric transport simulations are particularly sensitive to accumulated errors in horizontal wind and vertical velocity fields; therefore, we analyzed how compression-induced perturbations affected transport pathways, trajectory deviations, and tracer conservation along simulated trajectories. Our results demonstrated the trade-offs between data reduction, computational performance, and physical accuracy and identified compression strategies that achieved substantial data volume reductions while preserving the fidelity of transport simulations, highlighting the potential of controlled lossy compression as an efficient tool for large-scale atmospheric modeling and data-intensive applications.

We present a visualization and data transmission pipeline that directly connects ParaView's scientific data‑processing capabilities with Unreal Engine's photorealistic, interactive rendering environment, enabling real‑time exploration of large‑scale simulation results without intermediate disk I/O. The pipeline is enabled by JuSync, a middleware component that facilitates the workflow. In our implementation, a point‑based simulation is generated on‑the‑fly using Catalyst's in‑situ processing across multiple compute nodes on the JURECA HPC system. The simulation data is ingested by ParaView on the JURECA nodes, processed using filters, and prepared as mesh data (glyphs). ParaView with ANARI‑SDK streams the processed data as USD‑ASCII (USDA) scene graphs generated by ANARI‑USD by individual ranks acting as workers, which connect to a broker process on the same JURECA HPC system. The broker forwards these USDA streams to Unreal Engine via the ANARI‑USD device integrated into JuSync. ZeroMQ (ZMQ) handles the broker‑worker communication on the HPC as well as the communication to the Unreal Engine instance.

Within Unreal Engine, JuSync parses the USDA streams, extracts mesh geometry and attributes, and converts them into Unreal‑compatible real-time mesh formats using multiple Realtime Mesh Component (RMC) clients to accommodate higher vertex counts. This enables efficient rendering of large datasets. The converted meshes are dynamically updated in the DaVinCo application—a VR‑enabled Unreal Engine client—allowing interactive exploration on desktop workstations, large‑scale displays, or VR headsets.

By leveraging USD as a common interchange format and the ANARI abstraction layer with ZMQ, the pipeline eliminates the traditional workflow of writing large data files to disk, transferring them, and loading them into a rendering engine. It decouples scientific data processing from rendering while preserving metadata and hierarchical structure. The middleware receives data from HPC via ZeroMQ, with the broker‑worker logic implemented in the ANARI‑USD component on the HPC side, ensuring robust operation on systems such as JURECA, while not being limited to this system.

We demonstrate the pipeline with a point‑based particle dynamics simulation generated in situ via Catalyst and visualized in real time on a VR setup. Initial tests show the pipeline can handle datasets with tens of millions of points, with glyphs (tested with arrow and sphere meshes) applied to them. The approach is simulation-independent: any simulation that can render USDA files within the ParaView ANARI‑SDK interface using ANARI‑USD will work with Unreal Engine, regardless of the underlying simulation code.

Overall, the ANARI‑based pipeline from ParaView to Unreal Engine, enabled by JuSync, provides a practical foundation for real‑time scientific visualization in immersive environments, bridging the gap between high‑performance computing and modern game‑engine rendering. By eliminating disk I/O and leveraging USD‑based streaming, the pipeline delivers high‑fidelity visual feedback, enabling scientists to interactively inspect evolving simulations across a variety of platforms.

Do you know if your system performance has dropped since the last update? For many administrators and developers, this is a surprisingly hard question to answer. Continuous benchmarks might run in the background, but if the results are buried in text logs, CI/CD artifacts, or scattered repositories, critical issues go unnoticed until it is too late.
We present a solution to this visibility gap: a centralised, automated dashboard built within LLview, an open-source reporting platform [1].
Our framework takes a novel approach by separating the execution of benchmarks from their visualisation. This allows you to run tests wherever you prefer—on HPC clusters, cloud runners, or even quantum hardware—while the dashboard automatically "pulls" the results into a unified view. By using simple but generic configuration files, you define exactly what to measure and how to plot it, without writing a single line of frontend code.
In this poster, we demonstrate how this flexible tool is used to track standard performance metrics on supercomputers and, notably, to monitor the stability of Quantum Processor Units (QPU). We show how the same framework allows operators to track qubit gate fidelity and error rates over time just as easily as memory bandwidth. Join us to see how you can turn scattered logs into interactive insights, empowering both operators to maintain system health and users to verify application stability.
[1] http://llview.fz-juelich.de

Extreme-scale heterogenous computing systems are becoming central to coupled Earth system simulations, where strongly interacting component models impose performance and scalability requirements. TSMP2, the second-generation Terrestrial Systems Modelling Platform, uses a Multiple Program Multiple Data (MPMD) coupling strategy to target modern heterogenous nodes composed of multi-core CPUs and accelerators. In this contribution, we present a systematic performance characterization of TSMP2 across heterogenous hardware hierarchies, including intra-chip, intra-node, and inter-node configurations. Experiments are conducted on current leadership-class platforms, including JURECA-DC and the exascale JUPITER system. To isolate architectural and coupling effects, we use a controlled idealized benchmark configuration with uniform soil properties. We analyze resource allocation strategies across heterogenous deployments, and identify architectural configurations that optimize efficiency. The results show trade-offs in the performance of coupled MPMD workflows on emerging HPC architectures and highlight challenges in executing multi-physics models at extreme scale. Our findings provide practical guidance for optimizing coupled simulation frameworks and offer insights that are applicable to other heterogenous HPC applications.

A key aspect of developing research software is testing the installation and the expected results on various configurations, as well as benchmarking the performance preferably continuously. This applies especially to software that targets high-performance computing (HPC) installations around Europe and the world. For these applications performance, scalability, and efficiency are key metrics that need to be monitored and compared among systems. Due to the complexity of these technical installations, individual scripts written for a specific system lack portability, reusability and reproducibility.

These challenges were addressed by the development of the Jülich Benchmarking Environment (JUBE) [1] at the Jülich Supercomputing Centre (JSC). JUBE is a generic and lightweight framework that automates the systematic execution, monitoring, and analysis of applications. It is a free, open-source software [2] implemented in Python that operates on a "declarative configuration" paradigm, where experiments are defined in human-readable YAML/XML files, automating script generation, job submission, and result analysis. Due to its standardized configuration format, it simplifies collaboration and usability of research software. JUBE integrates seamlessly with CI/CD pipelines, enabling automated regression testing, performance tracking, and benchmarking as part of HPC software development workflows.

The entry barrier of JUBE is relatively low as it builds upon basic knowledge of the Linux shell and either XML or YAML, and an extensive documentation including tutorials and advanced examples is available [2]. Offering a high degree of flexibility, JUBE may be used in every phase of the HPC software development pipeline. Example use cases comprise standard benchmarks to track a project's development in terms of performance, or systematic studies to explore parameter combinations---including orchestrating scaling experiments, which has already been shown to streamline the application process for HPC compute resources [3]. JUBE has been previously used to successfully automate a large variety of scientific codes and standard HPC benchmarks, with configurations available open-source [4]. The software can be easily installed, with existing configurations also available for the software managers EasyBuild [5] and Spack [6]. Further projects have been built ontop of JUBE [7,8].

In conclusion, JUBE is a well-established software, which has already been used in several national and international projects and on numerous and diverse HPC systems [9-16]. Given its broad scope and range of applications, JUBE is likely to be of interest to those working in the HPC software sector.

This poster will provide an overview of JUBE, covering its core principles and presenting illustrative use cases to demonstrate JUBE's practical applications: - benchmarking as part of the procurement of JUPITER, Europe’s first exascale supercomputer; - a complex scientific workflow for energy system modelling [16]; - continuous insight into HPC system health by regular execution of applications, and the subsequent graphical presentation of their results.

[1] https://apps.fz-juelich.de/jsc/jube/docu/index.html
[2] https://github.com/FZJ-JSC/JUBE
[3] https://www.fz-juelich.de/en/jsc/jupiter/jureap
[4] https://github.com/FZJ-JSC/jubench
[5] EasyBuild: https://github.com/easybuilders/easybuild-easyconfigs/tree/develop/easybuild/easyconfigs/j/JUBE
[6] Spack: https://packages.spack.io/package.html?name=jube
[7] https://github.com/edf-hpc/unclebench
[8] https://dl.acm.org/doi/10.1145/3733723.3733740
[9] MAX CoE: https://max-centre.eu/impact-outcomes/key-achievements/benchmarking-and-profiling/
[10] RISC2: https://risc2-project.eu/?p=2251
[11] EoCoE: https://www.eocoe.eu/technical-challenges/programming-models/
[12] DEEP: https://deep-projects.eu/modular-supercomputing/software/benchmarking-and-tools/
[13] DEEP-EST: https://cordis.europa.eu/project/id/754304/reporting
[14] IO-SEA: https://cordis.europa.eu/project/id/955811/results
[15] EPICURE: https://epicure-hpc.eu/wp-content/uploads/2025/07/EPICURE-BEST-PRACTICE-GUIDE-Power-measurements-in-EuroHPC-machines_v1.0.pdf
[16] UNSEEN: https://juser.fz-juelich.de/record/1007796/files/UNSEEN_ISC_2023_Poster.pdf

Non-invasive brain stimulation offers a promising alternative for treating neurological disorders like Alzheimer’s disease or depressive disorder. Yet, optimization to individual clinical cases remains hindered by inefficient trial-and-error methods and the prior knowledge about individual brain area’s role in affecting the whole brain dynamics remains less understood given the complex inter-area connectivity. To address this, we leverage Arbor, an HPC-optimized library, to transition from empirical testing to high-fidelity digital twins by co-simulating it with other simulators. Our framework achieves exascale-ready neural modeling by integrating single-neuron biophysics with whole-brain dynamics. Key technical milestones include the implementation of scalable spike transmission, the integration of structural plasticity within the simulation kernel, and the development of a multi-scale co-simulation bridge between Arbor and The Virtual Brain (TVB). By combining morphologically detailed biophysical neurons with large-scale connectivity, this project aims to establish a scalable computational platform for investigating the long-term effects of stimulation parameters on complex neural architectures.

Quantum Computing (QC) is increasingly integrated into High Performance Computing (HPC) environments, and is more and more associated with hybrid applications where classical processing stages orchestrate quantum execution. In practice, these applications can be seen as complex workflows where classical pre-processing stages decompose a quantum algorithm into collections of heterogeneous tasks, and additional classical tasks coordinate the hybrid execution, with non-trivial data dependencies and execution constraints amongst them. These workflows must then be mapped onto available computing resources, which may include local HPC nodes for QPU emulation, remote cloud quantum devices, or HPC systems coupled to on-premises quantum hardware.

However, existing quantum software development kits enable circuit execution, but do not provide workflow-level abstractions compatible with HPC systems, while existing HPC workflow managers support task-based execution, yet lack mechanisms to represent quantum tasks and their infrastructure-dependent behavior. Existing approaches for quantum task management in HPC environments are provided by vendors and industry stakeholders, often embedded via ad-hoc or proprietary code that limits portability, interoperability and transparency. Addressing the limited availability of open and flexible hybrid task management solutions requires workflow-oriented representations and characterization methods that enable transparent performance modeling, cross-layer telemetry acquisition, and infrastructure-aware task placement.

To address this gap, we investigate workflow-oriented methods for hybrid QC-HPC applications, focusing on task-level workflow modeling and characterization (e.g. compute intensity, memory footprint, and communication patterns), and on how such information can support task placement and resource allocation on heterogeneous infrastructures. In particular, we study methods to capture relevant telemetry and metadata across software and system layers, including execution times, data volumes, transfer costs, and infrastructure-dependent performance factors. Our objective is to develop workflow abstractions and characterization methods that enable monitoring and systematic evaluation of hybrid QC-HPC workloads.

We ground this work in a use case developed at Barcelona Supercomputing Center (BSC), where circuit cutting techniques are used to transform large quantum circuits into workflow graphs composed of multiple interdependent, but overall more manageable tasks. This workflow structure raises practical challenges in terms of task decomposition, resource allocation, and performance evaluation when executed on QC-HPC systems.

This poster focuses on the fundamental question of how quantum algorithms can be represented as task-based workflows. We present an overview of existing workflow abstractions and discuss their applicability to quantum algorithm decomposition. We illustrate this through a case study based on circuit cutting workflows developed at BSC. This use case serves as an initial application use case to examine how such quantum algorithms can be represented within existing workflow models. It also allows us to assess the availability of application and system telemetry required for future studies on task placement and execution strategies. This study will provide a first step towards enabling infrastructure-aware workflow execution of hybrid QC-HPC applications.

Current neuromorphic and HPC workflows suffer from a usability gap, where mapping complex biological plasticity models to specialized hardware requires manual, error-prone, low-level coding. NESTML is a domain-specific modeling language that allows researchers in computational neuroscience to specify models of neurons and synapses in a precise and accessible way. These models can subsequently be used in dynamical simulations of spiking neural networks on various simulation platforms, such as NEST Simulator [3] or SpiNNaker [4]. This is achieved by means of platform-specific code generated by the NESTML toolchain. The generated code extends a simulation platform with new neuron models and synaptic plasticity rules, that can then be instantiated in a network of any size. Combining a user-friendly modeling language with automated code generation makes large-scale neural network simulation accessible to neuroscience researchers without requiring any prior training in computer science [2].

In this work, we establish an extension of the NESTML code generation toolchain that adds support for simulation of advanced synaptic plasticity rules on the SpiNNaker neuromorphic hardware platform [4]. We demonstrate our approach with code generation for a spike-timing dependent plasticity (STDP) synapse model in a simple network. The dynamics of the network is solved using exact integration [5]. The necessary numerical integration routines are automatically generated by the subsidiary toolchain ODE-toolbox [6]. We validate the simulation results by means of comparison of numerical outcomes of the simulation to those obtained from NEST Simulator running on a standard CPU as a reference. The proposed solution is generic, so that for instance the triplet STDP rule [7] can be expressed directly in the DSL, without requiring any further changes to the toolchain.

NESTML’s features make models easier to write and maintain, more easy to discover, share and reuse, as well as interoperable between platforms. Adding simulation support for the SpiNNaker platform not only bolsters reproducibility in neuroscience by allowing results to be compared between platforms, but also accelerates research and development for applications including edge computing and neuromorphic HPC. This project establishes the foundation for precise benchmarking of performance, memory efficiency, and power consumption. Additionally, support for neuromodulation will enable reinforcement learning as a training method for the network, opening up a wide range of applications. These will further benefit from the upcoming SpiNNaker-2 system installation at the Jülich Supercomputing Centre, making NESTML a key enabler in the transition towards modular supercomputing.

[1] https://github.com/nest/nestml/

[2] Blundell et al., Frontiers in Neuroinformatics 12, 2018

[3] Gewaltig & Diesmann, Scholarpedia 2(4), 2007

[4] Furber et al., Proceedings of the IEEE 102(5), 2014

[5] Rotter and Diesmann, Biological Cybernetics 81, 1999

[6] https://ode-toolbox.readthedocs.org/

[7] Gjorgjieva, Clopath, Audet, & Pfister. Proc. Natl. Acad. Sci. U.S.A. 108 (48) 19383-19388,(2011).

NESTML is a domain-specific modeling language for spiking neuronal networks incorporating synaptic plasticity [1]. It has been designed over the last 10 years to support researchers in computational neuroscience by allowing them to specify models of neurons and synapses in a precise and intuitive way. These models can subsequently be used in dynamical simulations of spiking neural networks (for potentially very large network sizes), by means of high-performance simulation code generated by the NESTML toolchain. The code extends a simulation platform (such as NEST Simulator [2], NEST GPU [3], or SpiNNaker [4]) with new and easy-to-specify neuron and synapse models, formulated in NESTML. Combining a user-friendly modeling language with automated code generation makes large-scale neural network simulation accessible to neuroscience researchers without requiring any training in computer science [5].

NESTML features a concise yet expressive syntax, inspired by Python. There is direct language support for (spike) events, differential equations, convolutions, stochasticity, and arbitrary algorithms using imperative programming concepts, in addition to flexible event management using handler functions and prioritization. These features make models easier to write and maintain and make models in general more findable, accessible, interoperable, and reusable (‘FAIR’ principles).

Models specified in the NESTML syntax are processed by an open-source toolchain that generates fast code for a given target simulator platform. Here, we demonstrate the code generation approach of NESTML for the NEST simulator, along with the performance and memory benchmarks for large-scale simulations. We achieve this by running a balanced random network of adaptive exponential (AdEx) integrate-and-fire neurons with Spike-Timing Dependent Plasticity (STDP) synapses. The networks are simulated on a high-performance computing (HPC) cluster. We perform strong scaling and weak scaling experiments and assess the performance of the network with NESTML-generated models, as compared to the NEST built-in models.

We compare the following combinations of neuron and synapse models: (i) NEST Simulator built-in neuron model + NEST Simulator built-in synapse model, (ii) NESTML neuron model + NEST Simulator built-in synapse model, (iii) NESTML neuron model + NESTML synapse model. We show that the NESTML-generated models perform as good as the handwritten models, with a small reduction in the performance (5% - 6%) and a slightly higher memory footprint (30%), specifically for the combination (iii), which can be attributed to the generic and model-agnostic process of code generation. We believe that this slight loss in performance is more than compensated for by the significant time savings achieved in writing and verifying the numerics of new models, as the use of NESTML allows the modeling process to be carried out in an agile and incremental manner, further speeding up the entire model development cycle. For the future, we focus on optimizations and improvements in the toolchain leading to performance gains that put the generated code on par or even above the NEST built-in models.

[1] https://nestml.readthedocs.io/
[2] Gewaltig & Diesmann, Scholarpedia 2(4), 2007
[3] Golosio et al., Frontiers in Computational Neuroscience, 2021
[4] Furber et al., Proceedings of the IEEE 102(5), 2014
[5] Blundell et al., Frontiers in Neuroinformatics 12, 2018

We present an NVShmem-distributed octree for hierarchical domain decompositions using uniformly resolved grids of multiple depths. Storing parent nodes yields a multi- layer octree that is particularly well suited for applications requiring scalable, multiply-resolved decomposition on heterogeneous GPU systems. We store application-required data contiguously in different resolutions. The implementation is optimized for modern high-performance GPU computing environments. It is fully GPU-aware and supports distributed computing via SHMEM-based one-sided communication for efficient halo exchange. This enables scalable performance across multiple GPUs and compute nodes with minimal communication overhead. Our library is implemented as a header-only C++20 and CUDA template framework. It is modular by design, allowing user-defined data storage, different space-filling curves (e.g., Hilbert, Morton, or striped variants). The index datatype is also customizable, ensuring portability across both low- and high-bit architectures as well as arbitrary tree depth.

The development of next-generation Earth system models is tightly coupled to advances in extreme-scale computing. In this contribution, we present performance analyses of the German weather forecast and climate model ICON (ICOsahedral Nonhydrostatic model) across heterogeneous leadership systems, namely JUWELS-cluster, JUWELS-booster and the exascale-system JUPITER. We present strong- and weak-scaling results on CPU and GPU architectures, identifying memory constraints and the impact of heterogeneous physics on load balance and energy efficiency.

Pushing toward kilometer-scale global climate simulations and large ensembles fundamentally shifts application requirements: higher resolution increases communication intensity, stresses memory bandwidth, and amplifies I/O demands. These constraints directly shape optimization strategies and portability decisions across systems.

The natESM initiative coordinates the development of a German Earth system model with ICON-atmosphere as its core component. While ICON provides atmosphere, ocean, and land modules, GPU porting is currently most advanced for the atmospheric component. We give an overview of the current Earth system modelling landscape in Germany, with emphasis on modularization, coupling strategies, and heterogeneous porting status as enabling factors for future fully coupled, high-resolution simulations.

Using ICON and natESM as concrete application drivers, we connect scientific ambition with architectural realities and illustrate how Earth system modeling both drives and exploits advances in extreme-scale HPC architectures.

Efficient cooling is a critical bottleneck for next-generation High-Performance Computing (HPC) and large-scale data centers, directly impacting both peak performance and environmental sustainability. Air cooling has long been the preferred method for cooling computing servers, but with the increase in consumption at computing sites, this technique has shown limitations in terms of its efficiency and environmental impact. Water cooling addresses these issues by providing more efficient cooling and reusing the heat produced by servers, which until now has been dissipated into the atmosphere. Some computing resource providers maintain a geographically distributed infrastructure that allows the heat produced by servers to be reused to contribute to heating networks (or other sites requiring a heat source). A data center with such a heat reuse system requires good management of computing loads and water temperature in order to maintain service and heating guarantees. Complying with temperature constraints at the outlet of the cooling circuit is essential but complicated due to the variable and unknown nature of server usage by users. Thus, to ensure a sufficiently high temperature, it is often customary to run synthetic loads (e.g., CPUburn, Minage) on unused servers in order to increase resource utilization and the system's outlet temperature. However, this approach represents a waste of energy and diverts computing capacity to unproductive calculations. In this work, we exploit the variability of the computational load as a lever for thermal action: when additional heat input is required, useful tasks are injected onto selected servers in order to increase their utilization. We present the implementation of such a non-intrusive task injection system on a real infrastructure. We identify categories of useful tasks that can be used for injection (e.g., log file compression, software compilation, unit testing, etc.) and describe how they are executed by a dynamically controllable resource provisioning system added in parallel to the existing system. In addition, a feedback loop uses the measured outlet water temperature to continuously adjust the load of injected tasks, thereby compensating for user-induced fluctuations. Using a model of energy consumption and the thermal dynamics of the outlet water, we design a two-level controller: an upper-level module calculates target workload profiles that comply with outlet temperature constraints, while a lower-level controller tracks temperature targets by regulating the size of injected task batches for better management of system dynamics and disturbances.

Scientific libraries for molecular dynamics must operate at sub-millisecond latency to be practically useful, requiring efficient strong scaling across many GPUs. At scale, even moderately sized systems reduce to only thousands or hundreds of particles per device, and extracting parallelism from these small work sets demands a detailed understanding of the underlying algorithm. We present two case studies from our CUDA optimisation of the Fast Multipole Method, each illustrating how identifying the right atomic work unit transforms GPU utilisation. In the far-field phase, we initially assigned one thread per box-box tensor contraction, which starved the GPU at upper octree levels where few boxes exist. By decomposing each contraction into p^2 fully independent operations, each assignable to a separate thread with no communication overhead, we recovered utilisation at coarse levels and gained an additional dimension for tuning occupancy across all levels, yielding roughly 15 to 20% faster wall-time M2L performance on a 7000-particle sodium chloride system. In the near-field phase, parallelising over particles is inherently limited and load-imbalanced, as the number of pairwise interactions can scale as N^2 while work is distributed over only N threads. Parallelising naively over interactions instead introduces memory inefficiency and many redundant costly atomic force updates. We resolve this by tiling the interaction space into warp-sized blocks, enabling efficient local processing while asymptotically parallelising over N^2 interactions, and opening a natural path to tensor core acceleration in future work. This alone reduces near-field runtime by nearly 50% on the same system compared to either approach.

Molecular dynamics (MD) simulations have relied heavily on high-performance computing (HPC) resources for decades. For long-range Coulomb interactions—the de facto standard in MD—the Particle-Mesh Ewald (PME) method remains dominant. With its near-optimal O(N log N) runtime complexity, PME enables efficient time steps on the millisecond scale and is widely supported across CPU and GPU architectures. However, its O(p²) communication overhead, stemming from internal Fast Fourier Transform (FFT) operations, poses a significant bottleneck.

In this work, we explore a viable alternative: the Fast Multipole Method (FMM), a long-range solver with linear runtime and communication complexity, making it a compelling candidate to overcome current performance limitations. Historically, energy conservation errors in tree-based FMM approaches have constrained its adoption. Here, we present recent advances that mitigate these challenges, including:

• Reduced energy drift through refined numerical formulations,
• Improved numerical stability at lower precision levels, and
• Lowered accuracy complexity without sacrificing fidelity.

We benchmark FMM against PME-based simulations and discuss scenarios where FMM may emerge as the superior choice, particularly in large-scale or communication-bound systems.

The growing disparity between computational throughput and memory bandwidth has become a major bottleneck in large-scale computational fluid dynamics (CFD). As grid resolution increases, the volume of data movement often dominates runtime, motivating the exploration of alternative data representations that can reduce memory traffic. In this work, we investigate Matrix Product States (MPS), a tensor-network representation originally developed in quantum physics, as a compressed representation for CFD variables and evaluate its performance on modern GPUs.

We implement a three-dimensional incompressible Navier–Stokes solver in which all flow variables are stored and updated entirely in MPS form. The solver is discretized using a finite-volume method on structured grids with a fractional-step time integration scheme. To analyze performance characteristics, we focus on the core MPS operations required for the solver, particularly the MatVec operation with matrix product operators that encode CFD stencil operations. GPU-oriented optimizations, including loop-order tuning, tiling strategies, and bond-dimension–aware execution policies, are systematically investigated using Kokkos-based implementations.

Our results demonstrate that MPS-based representations can substantially reduce memory requirements while enabling large-scale simulations, including a 1024^3 problem on a single GPU. Performance profiling reveals that runtime is dominated by bandwidth-sensitive tensor contractions and that kernel efficiency strongly depends on loop ordering and tiling parameters. Appropriate tuning significantly improves GPU utilization and mitigates bottlenecks caused by irregular bond dimensions.

These findings highlight that MPS-based CFD should be treated not only as a compression technique but also as a performance engineering problem. The study provides practical optimization strategies and a performance-oriented perspective for advancing tensor-network–based CFD solvers on emerging GPU architectures.

The A64FX chip in Fugaku provides power control mechanisms known as power knobs, including adjustable CPU frequency at 2.0/2.2 GHz, eco mode that disables one of two FP pipelines, and core retention. By combining these features, we defined boost-eco mode, which operates at 2.2 GHz with a single FP pipeline, and adopted it as the system-wide default in March 2025.

In a previous report, we described the phased implementation of these power-saving features from 2021 to 2025, achieving a 29.4% reduction in average node power consumption. Through clustering analysis of production job records, we found that boost-eco mode benefits the majority of workloads, approximately 77%, but compute-intensive jobs, 19.6% of the total, show degradation in elapsed time and Energy Delay Product (EDP).

The degradation of compute-intensive jobs is an expected consequence of disabling one FP pipeline, but our previous analysis relied solely on operational statistics. To supplement this with baseline data at the microarchitectural level, we conducted controlled benchmark experiments using DGEMM and STREAM with Fujitsu's CPU performance analysis profiler. For DGEMM, disabling one of two FP pipelines causes 16.3% performance loss. The 16.2% power reduction is entirely offset by longer execution time, resulting in virtually no energy savings and 19.5% EDP degradation. For STREAM, FP pipelines are largely idle regardless of mode, so disabling one has minimal impact at 3.7% performance loss. The power reduction translates into 7.9% energy savings and 4.4% EDP improvement.

These results provide a straightforward microarchitectural explanation for the patterns observed in four years of operational data. For workloads bottlenecked by FP computation, eco mode removes the resource they need; for memory-bound workloads, it removes a resource they are barely utilizing, yielding a net energy benefit.

These findings point toward a workload-aware approach for future operations, where eco mode could be selectively applied based on job characteristics identified at submission time, improving overall system energy efficiency without penalizing compute-intensive applications. As future work, we plan to extend our evaluation using the NAS Parallel Benchmarks (NPB) and representative mini-applications to characterize eco mode behavior across a broader range of computational patterns, including mixed compute/memory workloads and communication-intensive codes.

Fully homomorphic encryption (FHE) enables neural network inference on encrypted data, but CKKS-based approaches remain computationally expensive and challenging to deploy, with existing GPU implementations often focusing on micro-benchmarks or single-operation performance rather than end-to-end behavior of realistic CNN models under practical cryptographic constraints. We present a fully automated compilation and execution pipeline for privacy-preserving CNN inference on GPUs without manual cryptographic engineering. Our approach leverages the ORION framework to compile standard PyTorch models into CKKS-executable computation graphs, which we then execute on an enhanced GPU backend (HEonGPU) extended with unified-memory management and additional homomorphic operators. This end-to-end automation enables systematic evaluation of multiple standard CNN architectures—including ResNet-20, ResNet-34, and variants with both ReLU and SiLU activations—under realistic security levels (128-bit and 192-bit). Through systematic exploration of CKKS parameter configurations on ResNet-20, we identify settings that balance accuracy, latency, and security guarantees, and demonstrate that these configurations transfer effectively to deeper models. Our GPU implementation achieves up to 30× speedup over CPU baselines while maintaining cleartext-level accuracy. We further provide detailed performance characterization through operation-level runtime decomposition and layer-wise precision analysis, revealing where numerical errors accumulate and quantifying the precision requirements of encrypted CNNs via controlled bootstrapping experiments. Our results demonstrate that moderate CKKS configurations, coupled with system-level GPU optimizations, suffice for practical encrypted inference across a range of CNN architectures, bridging the gap between cryptographic theory and deployable privacy-preserving machine learning systems.

Recent SmartNICs consist of programmable hardware as FPGA, CPU cores or an array of packet processing cores.

NVIDIA ConnectX devices has one such array of packet processing cores.

An intuitive application for these cores is offloading collective communication algorithms to them.

Anomaly detection plays a critical role across diverse domains, including medical risk assessment, environmental monitoring, and financial fraud detection, and these applications commonly rely on time-series data where subtle deviations can carry significant meaning. But despite the demonstrated effectiveness of autoencoders in identifying such anomalies, a rigorous and systematic benchmark for quantum autoencoders in time-series contexts is still lacking. Therefore, we present a comprehensive benchmarking study that evaluates multiple quantum autoencoder models against state-of-the-art classical models, demonstrating their performance and potential advantages in time-series anomaly detection tasks.

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Dynamic resource management (DMR) offers a promising path to converge High-Performance Computing (HPC) and Quantum Computing (QC) by enabling hybrid applications to adapt their resource usage at runtime. In this work, DMR is integrated with malleable MPI applications to dynamically resize the set of allocated classical resources according to the current phase of a hybrid HPC-QC workflow. During classical phases, the application can expand to exploit multiple nodes, while in quantum phases it shrinks, releasing unused classical resources while waiting for quantum execution. This phase-aware adaptation reduces idle time on HPC nodes and improves overall system utilization in scenarios where quantum resources are scarce and accessed as accelerators. The proposed approach targets transparent integration with existing batch schedulers and MPI codes, paving the way for more efficient execution of hybrid workloads and making HPC-QC convergence practical from the resource management perspective.