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A-04: Symp A
Tuesday, 20/Jun/2017:
1:30pm - 3:30pm

Session Chair: Xiao Gong, National University of Singapore
Location: Rm 307

III-As/P Growth and Characterization 

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1:30pm - 2:00pm

300mm High-Mobility III-V Layers on Insulator Substrates (III-V-OI)

Julie WIDIEZ1, Thierry BARON2, Gweltaz GAUDIN3, Lukas CZORNOMAZ4, Mickaël MARTIN2, Christelle VEYTIZOU3, Frédéric MAZEN1, Reynald ALCOTTE2, Veeresh DESHPANDE4, Jean FOMPEYRINE4, Jean-Sébastien MOULET1

1CEA, LETI, MINATEC Campus, France; 2CNRS, LTM, France; 3SOITEC, France; 4IBM Research GmbH Zürich Laboratory, Switzerland

High-mobility III-V materials such as InGaAs are promising candidates to replace strained Si in n-channel MOSFETs for low power logic application. A prerequisite in view of their VLSI integration is the formation of high quality III-V heterostructures on a silicon substrate to enable production on large size wafers. III-V integration on Si by direct wafer bonding is considered as one of the possible paths towards this objective. The presented work will focused on the III-V material epitaxy on silicon and on the III-V layer transfer using the Smart Cut™ technology.

The epitaxy of III-V materials on Si presents many difficulties mainly because of the large difference in lattice parameter and the polar/non-polar character of layer/substrate interface thereby generating defects in the epitaxial layers. To obtain InGaAs thin film with the desired properties, we have first optimized the growth of a GaAs/InP buffer layer using an Applied Materials 300 mm MOCVD tool. The InGaAs layer crystalline quality is directly dependent on the GaAs/InP buffer defectivity. We have obtained antiphase boundaries free GaAs layers directly deposited on nominal Si(100) 300 mm wafers with a thickness as low as 150 nm. This layer is used as a buffer to grow InGaAs thin film.

We have successfully transferred the InGaAs layers described above using both the direct bonding and the Smart Cut™ technologies in 300 mm. We report the first demonstration of 300 mm InGaAs-on-insulator substrates. The III-V donor wafer can be reused for a new cycle. The next challenge, which is now being pursued, is the ability to transfer III-V layers onto processed Si/SiGe-based devices wafers. This will allow heterogeneous technologies to be co-integrated via a monolithic process to build much denser and performant 3D chips.


The authors would like to thank SOITEC S.A. and FP7-ICT-2013 COMPOSE3 for financial support.

2:00pm - 2:30pm

Building III-V Devices onto Large Si Wafers for Optoelectronic Applications

Xinyu BAO, Zhiyuan YE, Errol SANCHEZ, Hua CHUNG, Schubert CHU

Applied Materials, United States

III-V semiconductor materials have been drawing extensive interests in the past decades due to their superior electronic and optical properties. Compared to Si, III-V materials have an electron mobility about one order of magnitude higher and injection speeds several times faster. CMOS devices can benefit from higher mobility and faster injection speed to improve operation frequency, current, power consumption, and reduce short channel effect, etc. It provides an alternative path when size scaling becomes more and more difficult. With sophisticated bandgap engineering, III-V materials also provide a broad range of optical applications such as optical transceivers, infrared and visible LEDs/photo detectors, photovoltaics, and lasers. It’s ideal and cost effective to integrate III-V with large Si substrates to take advantage of the main stream Si process flow in the semiconductor industry. The biggest challenges are lattice mismatch between different layers and anti-phase boundary (APB) caused by polar/nonpolar planes. In this paper, we reviewed the process issues on blanket wafers and selective growth on patterned wafers using the Applied Materials’ 300mm III-V MOCVD tool. Anti-phase defects free GaAs films were achieved by optimizing the surface pre-cleaning and growth conditions on industrial standard 300mm Si (100) wafers. High quality growth on patterned wafers was also demonstrated with room temperature PL.

2:30pm - 2:45pm

MOCVD Ge-on-GaAs and its p-type Doping via Incorporating Ga Atoms

Hongfei LIU

Institute of Materials Research and Engineering (IMRE), Agency for Science, Technology and Research (A*STAR), Singapore

Ge and Ga-doped Ge thin films have been epitaxially grown on GaAs (001) substrates by MOCVD. Structural studies revealed that the temperature of the substrate played an important role in controlling the Ga-incorporations as well as affecting the surface morphologies. Dot, dot-in-hole, and hole structures have been observed by changing the growth temperature under, otherwise, the same MOCVD conditions for p-type Ge. Atomic interdiffusions across the Ge/GaAs interface and a formation of intermediate layer wherein have also been observed, these occurrences are also more or less affected by the incorporation of Ga dopants. Detailed structural and morphological properties of these Ge-on-GaAs heterostructures will be presented at the meeting.

2:45pm - 3:00pm

Control Wafer Bow of InGaP on 200 mm Silicon by Strain Engineering

Bing WANG1, Riko I. MADE1, Kwang Hong LEE1, Cong WANG1,2, Kenneth Eng Kian LEE1, Soon Fatt YOON1,2, Eugene A. FITZGERALD1,3, Jurgen MICHEL1,4

1Singapore-MIT Alliance for Research and Technology, Singapore; 2School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore; 3Department of Materials Science and Engineering, Massachusetts Institute of Technology, United States; 4Microphotonics Center, Massachusetts Institute of Technology, United States

InGaP has various applications in light emitting diodes (LEDs), solar cells, and hetero bipolar transistors. The epitaxial growth of InGaP on silicon (Si) substrate would enable the integration of these devices with Si CMOS circuits. Using high quality germanium buffers lattice-matched InGaP films can be grown on Si substrates. Operation of InGaP red LEDs on 200 mm Si was demonstrated before. However, due to the mismatch of coefficients of thermal expansion between InGaP and Si, tensile strain is generated in InGaP films during the cool down and this eventually induces wafer bow that can exceed 100 mm on 200 mm wafers. The large wafer bow hinders other important processes such as wafer bonding and stepper lithography. To explore solutions for this problem we applied strain engineering in InGaP films. 200 mm InGaP on Si wafers having different strain status (tensile, near-zero, and compressive) were grown in MOCVD chamber. Wafer bow was decreased from more than 100 mm in tensile strained InGaP to less than 50 mm in compressive strained InGaP. The larger of the compressive strain, the smaller of the wafer bow. The anisotropic wafer bow along (110) and (1-10) directions was induced by anisotropic strain relaxation in InGaP films, as proved by X-ray diffraction reciprocal space mapping. Etch pit density and plane-view transmission electron microscopy imaging show that the threading dislocation densities of the lattice-mismatched InGaP films did not obviously increase compared to the lattice-matched InGaP. This study shows that strain engineering is an effective method to control wafer bowing of InGaP films on Si. It can also be used for other III-V epitaxy on Si.

3:00pm - 3:15pm

Analysis of MOCVD Grown Indium Gallium Arsenide Layer on Buffered Silicon Substrate by X-ray Photoelectron Spectroscopy


Indian Institute of Technology Kharagpur, India

The growth of III-V compound semiconductors on lattice matched substrate is well reported. But the growth of III-V semiconductors on silicon platform is a challenging task due to lattice mismatch between them. Because of the lattice mismatch direct epitaxial growth of III-V semiconductor on silicon substrate could not be achieved other than the low dimensional structures (Quantum Dots, Nanowires etc.). In this work the growth of indium gallium arsenide is studied on silicon substrate followed by a gallium arsenide and an indium phosphide buffer layers. InxGa1-xAs layer is grown by Metal Organic Chemical Vapor Deposition (MOCVD) technique on p-Si (100) substrate having a carrier concentration of 1016 cm-3. InxGa1-xAs layer growth was carried out in a horizontal atmospheric pressure reactor.

The source of indium and gallium were metal-organics, i.e. tri-methyl indium (TMIn) and tri-methyl gallium (TMGa) respectively. The source of arsenic was arsine gas (AsH3) and that of phosphorus was phosphine gas (PH3). The flow rate of TMIn, TMGa and AsH3 were 10, 6.8 and 45 sccm respectively for the growth of the InxGa1-xAs layer. The carrier gas was high purity hydrogen with a flow rate of 4 slpm. Growth of InxGa1-xAs was carried out at a temperature of 625 0C. The buffer layers are grown at 5500C.

The grown layer is studied by UV-Vis-NIR reflectance spectroscopy, grazing incidence X-ray diffractometry (GIXRD) and X-ray photoelectron spectroscopy (XPS). Composition, band gap and thickness were estimated from UV-Vis-NIR spectroscopy. The crystalline quality of the grown film has been investigated by GIXRD. The binding energy of the electron in the XPS spectrum gives the elemental composition of the grown film. It also confirms the growth of InxGa1-xAs layer.

3:15pm - 3:30pm

Antiphase Boundaries in GaP Layers Grown on Si(001) Studied by Cross-Sectional Scanning Tunneling Microscopy

Christopher PROHL1, Henning DÖSCHER2,3, Peter KLEINSCHMIDT2,4, Thomas HANNAPPEL2,4, Andrea LENZ1

1Institute of Solid State Physics, Technical University of Berlin, Germany; 2Helmholtz Center Berlin for Materials and Energy, Germany; 3Philipp University of Marburg, Germany; 4Institute of Physics, Ilmenau University of Technology, Germany

GaP-based materials are of high interest for realization of epitaxial integration of III-V layers for optoelectronics on Si(001) substrates. However, the growth of polar GaP on non-polar Si substrates leads to antiphase domains accompanied by antiphase boundaries (APBs). APBs are well known to form {111} or {110} planes within the crystal. Beside stoichiometric {110}-oriented APBs, which are energetically the most favorable ones, experimental studies reported on nanometer scale displacements of {110} APBs. This means that beside macroscopically charge-neutral {110} APBs also slightly charged ones exist, affecting the device’s performance even more. With regard to optoelectronic applications, a detailed knowledge of the type and quantity of the so-called wrong bonds is thus highly preferable.

Due to its high surface sensitivity, cross-sectional scanning tunneling microscopy (XSTM) is a powerful method to investigate nanostructures or interfaces on the atomic scale. Here, we report on an XSTM study of APBs within GaP layers grown on Si(001) substrates by metalorganic vapor phase epitaxy. Within relatively large XSTM images APBs with an averaged direction of [-1-12], i.e. corresponding to a {111} pane, can be identified by a bright electronic contrast due to their Ga-Ga or P-P wrong bonds. In atomically resolved XSTM images, the APBs can be determined by the relative shifts of the atomic chains positions. In addition, the XSTM data shows that there are several deviations from the average APB direction. The detailed analysis indicates that smaller inclusions of higher-index {112} and {113} APB planes lead to shifts from one {111} APB plane to neighboring ones [1].

This work is supported by project LE 3317/1-2 of the Deutsche Forschungsgemeinschaft.


[1] C. Prohl et al., J. Vac. Sci. Technol. A 34, 031102 (2016).

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